A Practical Guide To RF And Mixed Signal Printed Circuit Board Layout pdf pdf

Contents

  

  

  

  

  

  

  

  

  

  

  

Table of Figures

  

  

  

  

  

  

  

List Of Tables

  

Acknowledgements

  The author would like to express thanks and appreciation to the following people, without whom it would not have been possible to put this guideline together. Nick Barbin. President - Optimum Design Associates. For providing the idea, encouragement, patience, and the time to compile and present the guideline. This guideline took many hours to produce and would not have been possible if the time was not proved to do so. Scott Nance. Senior Designer - Optimum Design Associates. For his invaluable assistance in so many ways. Scott spent many hours reading word by word, providing extremely useful content, corrections, feedback and suggestions for improvement. Scott has also presented this guideline in slide show/discussion form at trade shows and at specific customer sites. Rick Hartley. Industry recognized consultant on the topic of High Speed and Mixed Technology Design. Rick was kind enough to volunteer his time to read the guideline completely and provided much extremely useful feedback and some very critical and needed corrections to the content. Robert Frank. Marketing Manager - Optimum Design Associates. For many hours of proof-reading, grammar correction and for getting this book published. Optimum Design Associates Designers. The entire design group at Optimum Design Associates. These include Randy Holt, Scott Nance, Juliet Wang, Tom Stout, Mark Gutierrez, Frank Jacobson, Brian Noble, Rick Dachauer. All of these designers have contributed over the years by way of being part of a collaborative team of senior designers. We all have both common and specific skills and learn from each other.

Forward

  This guideline is presented as a practical guide to the physical layout design of RF and, in particular, mixed technology circuit boards. Mixed technology refers to the combination of low frequency analog, high frequency RF, power supplies, digital circuitry and even motor drivers, all in a single design. The guideline does not present pages of RF theory and formulae, those are for the electrical engineer and the engineering design has already been done by the time the circuit board layout process is started. Some formulae and theory are presented however, not for the day to day design process but more as an aid to understanding some of the things layout designers need to consider more for mixed technology design than would be the case in a purely digital design. One of the main aims of this guideline is to use plain words wherever possible to present information that is normally presented with a lot of formulae, numbers and theory and which is, quite frankly, lost on most layout designers. What the layout designer needs is information on what to do at the circuit board level when designing the physical layout, not the engineering circuit. The circuit board layout process is the last real design phase in the product development cycle, and it is certainly the phase that is normally placed under the most pressure in terms of time to complete, because everything that comes before it always takes longer than the time budgeted. As a result, the layout designer needs to be as efficient as possible and make use of proven methods and techniques to complete the task in as timely a manner as possible while still being technically correct. The issues faced when designing circuit boards for RF and mixed technology applications that are not usually considered so critically in designs for only digital applications will be described. Techniques and methods will be presented that have been used consistently over many years of designing circuit boards for all types of applications, many of which were for radar systems, RF modems and satellite payload systems.

  Some of these methods and techniques may be considered technically unnecessary or may well conflict with what some designers currently do or are advised to do by their peers, but everything presented in this guideline has been used very successfully over a long period of time designing mixed technology circuit boards. There is no ‘one size fits all’ solution to the challenge of mixed technology design. There are many different views and approaches to the problem. Electrical engineers, layout designers, actual designs, constraints and CAD tools each differ greatly and yet we are still able to produce designs that work well despite all these variations, so there are clearly many methods that do work well. Although this guideline is much more for layout designers rather than the electrical engineers, there is also much useful information for electrical engineers which will help them to understand some of the real world design, fabrication and assembly issues that layout designers face in the process of producing the layout and that they themselves would rarely consider.

  So What’s The Difference Between Analog And

Digital?

  Understanding the main differences between these two design types is a key part of understanding why some things the layout designer does will have a more significant effect in one design type versus the other. In truth, the more challenging design is still the analog one, because the big difference is that in analog design some things need to be considered a lot more carefully than they would be when doing a purely digital design. A layout designer still needs to consider the same things in digital design, but often to a significantly lesser degree because digital designs can be reasonably tolerant to many of these issues. Having said that, as operating frequencies increase and logic voltage levels decrease in digital circuits, layout designers are finding that issues traditionally more important in analog circuits are becoming just as important in digital circuit layouts. The differences between digital and analog domains are, with respect to circuit board layout, becoming less and less obvious.

  Information Integrity.

  

Just as in a digital design, the critical issue in an analog design can be thought of as being ‘information integrity’. In a digital

design the information is being conveyed by means of ‘ones and zeros’, the circuits generate and respond to discrete voltage

levels representing a binary 1 or 0. Typically a high voltage represents a 1, and a low or zero voltage represents a 0. There is

usually no information conveyed by voltage levels other than those. In an analog design, information is conveyed, in different

ways, by voltage levels continuously variable from microvolts to tens or even hundreds of volts. Similarly, the frequency in a

digital system, with few exceptions, simply controls how fast the data is conveyed or processed, while in an analog system the

frequency of a signal often IS the information content of the signal. The phase of an analog signal and its relationship to the

phase of another signal is often the information content of an analog system as well.

  Amplitude, frequency and phase are also extremely important in a digital design, but digital systems are usually more tolerant to some degradation in all of these, some to a lesser extent than others. However, in an analog system, there can be very little tolerance to degradation in any of these parameters because they ARE the information being processed.

  Placement and routing of RF circuits is far more critical than with digital circuits. Placement is critical because inputs and outputs need to be physically separated, discrete component placement (especially inductive components) is very critical and the circuit needs to ‘flow’ in a sensible manner. The main criterion for digital circuit placement is usually easiest routing before anything else. Even though there are far fewer signals involved, routing is also more critical in RF designs because the copper connections, while performing the normal connectivity function of a trace, are also now functional circuit elements in their own right. Traces and component pads have resistive, capacitive and inductive properties. At extremely high frequencies these trace and pad properties contribute significantly to the overall circuit behavior. All metal on an RF circuit board should be considered RF-functional.

Do We Still Use Analog?

  While we may be living in the digital age, analog circuits are still prevalent, and we use them every day. Equipment with significant analog circuit content includes things like cell phones, audio amplifiers, instrumentation amplifiers, radio receivers, data acquisition and measurement circuits, medical imaging, monitoring and treatment equipment, power supplies and, of course, RF and microwave circuits used in satellite and radar systems. Most equipment using analog circuits today also includes some digital circuitry. For example, an audio amplifier/receiver contains a lot of sensitive and critical analog circuitry for audio processing, both at extremely low levels at the inputs and very high levels at the outputs. It also contains increasing amounts of digital circuitry for such functions as digital tuning, volume and tone controls, analog to digital conversion and processing to add predefined effects to the sounds and then conversion back to analog for output to the speakers. There is also storage and retrieval of the analog data on digital media because it is far more reliable, portable, lower cost and much faster than analog storage media like disc records and tapes.

What’s The Frequency?

  With analog and RF systems, signals tend to consist of a single or small number of fundamental frequencies. There are usually multiple signals of interest, but it is a smaller number of different frequencies or a specific range of frequencies that the layout designer is concerned with. All other frequencies present would be considered as noise or interference signals which need to be controlled or filtered out so that only the frequencies of interest are processed as effectively as possible. There will, of course, be some harmonics of these intended frequencies present but typical RF designs utilize many filters in the signal path to ensure that only signals of the frequencies of interest are passed to or from circuit blocks. In digital designs, signals are what we call square waves. A square wave is actually the sum of a sine wave of the same (fundamental) frequency, plus all the odd harmonics of that frequency at diminishing amplitudes. A faster rise time of a digital signal indicates that there are more high frequency harmonics present. So in any digital system you will have signals present of much higher frequency that you might think. Hence the term ‘it’s not the frequency that matters, it’s the edge rate’, because a faster edge rate (rise time) indicates the presence of much higher frequency content than the actual ‘clock frequency’. Many layout designers simply look at the clock frequency and think that this is the frequency that they are ‘designing for’ when, in reality, there are much higher frequencies present that should be considered.

When Does Analog Become RF?

  Traditionally, analog circuits were low frequency systems for supply of power and for voice and audio signal processing, because that’s what we developed electronics for first – the telephone for example. RF circuits were developed for long distance real time communication, where we could now transmit our voices over long distance through Radio Frequency waves rather than having to have a solid wire between two or more points. These systems produced, transmitted and received radio frequency signals ranging from hundreds of KHz to hundreds of MHz.

  It has become normal to think of RF as being in the 3 MHz – 300 MHz range. Analog circuits operating in the 300 MHz – 300 GHz range were traditionally referred to as microwave circuits. There are many opinions on when an RF signal becomes microwave, with above 300 MHz is the generally accepted point. Between 30 GHz and 300 GHz is often referred to as Millimeter Wave because the wavelength in this band ranges from 10mm to 1mm, but generally microwave refers to everything above 300 MHz.

  Given these frequency ranges, it is clear that most digital circuits today are operating well into what are traditionally known as the RF and microwave frequency ranges. In this guideline we do not focus on the difference between frequency ranges, but more on what a layout designer can do to help these fundamentally different circuit types operate in harmony together on a single circuit board and at a wide range of frequencies.

Converging Domains

  Much of what is presented in this guideline will use terms most layout designers have already heard in reference to digital designs. Impedance matching, transmission lines, return loss, coupling, noise and interference, crosstalk, delay tuning, signal integrity etc. are all terms layout designers have become familiar with over the last decades. That is because these are predominantly high frequency related terms describing phenomena that layout designers need to be aware of, and are becoming more prevalent because digital designs are operating at higher and higher frequencies all the time. Well, it is not new terminology by any means. These are things that have been the concern of RF and analog electrical engineers and layout designers for the last 50 years or more. In the early days of digital systems, voltage levels were 5 Volts, 10 Volts or even higher. Frequencies were in the hundreds of KHz and very low MHz ranges with much longer rise times than is the case today. At these low frequencies, and with these voltage levels (the voltage levels required to cause a change from a 0 to a 1 were in the order of 3 volts or more) there was an inherent immunity to noise virtually built in. There was much less noise to consider anyway, because such slow circuits did not cause much significant radiation. Today, some digital circuits are operating at sub 1 Volt levels, with the logic thresholds diving into the hundreds of millivolts range, and with frequencies into the GHz ranges with sub-nanosecond edge rates, so the high frequency content and EMI radiation are much increased. Today’s high speed digital designs really do need to be treated as low level high frequency analog designs.

  

Analog / RF Issues To Consider

Loss

  One of the primary concerns in analog and RF systems is the efficient transfer of power. All of the signal power present at the output of any circuit block should ideally be transferred to the next stage of the circuit. When a signal needs to be attenuated, it should be done in a controlled manner using an attenuator device that will produce predictable and repeatable results. Signal power losses due to non-circuit elements like impedance mismatch, incorrect transmission line design or material selection issues are potentially detrimental to the functioning of the circuit. Some losses are unavoidable, there is no such thing as a perfect signal environment. There are losses inherent in the circuit board materials and there are losses as a result of design parameters and techniques.

Dielectric Loss

  Dielectric loss, specified as dissipation factor (Df) on a vendor’s datasheet, (which will never be zero), is inherent in the laminate and prepreg materials used to fabricate the board. It is the loss of energy that goes to heating a dielectric material in a changing electromagnetic field and, in circuit board laminates, is a function of the materials’ molecular structure and resin type and content. There are a very wide range of materials available, some of which exhibit dielectric loss orders of magnitude lower than others. Dielectric loss is proportional to frequency, and is therefore more critical to consider with higher frequency lower power designs.

  The following table lists some commonly used printed circuit materials and their corresponding dielectric loss values.

  Df Dk Relative PCB Composition

  Material @10GHz @10GHz Tg cost/Mfg Tier

  ISOLA Epoxy/Woven Glass

  370HR 0.025

  3.92 180 1-FR-4

  ISOLA Epoxy/Woven Glass

  FR408HR 0.0095

  3.65 190 2-LowLoss NELCO

  Epoxy/Cyanate Ester/Woven N4000-13 EP

  Glass SI

  0.007

  3.2 210 2-LowLoss PANASONIC

  3- MEGTRON 6 Epoxy/PPE/Woven Glass 0.004

  3.3 UltraLowLoss 185

  Hydrocarbon/Ceramic/Woven ROGERS

  3- Glass

  RO4350B 0.0037

  3.48 UltraLowLoss 280

  NELCO 4-

  Polyimide/Woven Glass 7000-2 V0

  0.010

  3.8 Performance 250

  ARLON 4-

  CLTE XT PTFE/Ceramic/Woven Glass 0.0012

  2.94 Performance 230

  TACONIC PTFE/Metal Backed

  TacLamplus 0.0004

  2.1 230 5-Custom

  

Table 1. Common Circuit Board Materials Of Different Compositions With Loss And Dielectric

Constant.

  Formulae and equations can be found that will translate this information into dB loss values at particular frequencies. That level of detail is not presented here because, as a layout designer, the main concern is, “What am I contributing to loss?” Dielectric loss is beyond the control of a layout designer unless the layout designer is also entirely responsible for material selection. Lower loss materials are more expensive, so, in many cases, they are not even a consideration. The layout designer needs to be aware of the phenomena and which materials are better for a particular design, in order to make valid recommendations regarding material selection.

  In an analog design, when a signal is injected into a transmission line, the frequency of the propagated wave will be unchanged, but the amplitude will be decreased due to dielectric loss. The amount of loss will be dependent on the length of the transmission line, and the frequency of the signal (because dielectric loss is proportional to frequency). This is one of the reasons we always strive to keep higher frequency connections as short as possible. Extremely low level analog circuits, such as instrumentation amplifiers or low power receiver front ends, require consideration of dielectric loss because of the intolerance of these circuits to amplitude loss.

  Digital signals are square waves, which consist of the fundamental frequency plus an infinite number of embedded sine waves at odd harmonics (odd multiples of the fundamental frequency) and at diminishing amplitudes. Digital signals generally have very strong amplitude at the fundamental and lower harmonic frequencies up to an approximate frequency as determined by the equation:

  

f = 0.35 / T

r

where f = frequency in GHz and T = Signal Rise Time in nanoseconds.

r

  Digital signals contain a bandwidth of frequencies, from the fundamental frequency to the frequency determined by the above equation, which are particularly affected by dielectric loss. Most digital circuits will operate quite well on the ‘standard’, higher loss materials, but material selection must be considered when digital circuits are operating above 3 - 5 GHz. Evolving device technologies also means that edge rates are becoming faster, therefore overall frequency content is increasing, even if the ‘clock frequency’ is kept the same, so it may well be that using a low loss material becomes a necessary consideration for a design where it may not have normally been considered.

Skin Effect

  Conductor loss is related to the way current flows in a conductor. At low frequencies, current in a conductor will flow in the entire cross section of the conductor. At higher frequencies, current tends to concentrate in the thin outer portion of the trace. (See Figure 1) This is known as Skin Effect. This phenomena effectively reduces the cross sectional area of the conduction path, making it more resistive. This can be offset to a certain extent by using wider traces where impedance modelling allows. Wider traces will exhibit less variation in resistance with frequency so the trace will be less lossy. Because it increases the effective resistance of the signal path, skin effect also has an effect on transmission line impedance, making selection of the correct termination resistor values more complex.

  Smooth surface is better.

  

Copper surface roughness contributes to increased loss due to skin effect because the overall resistance of the path is a

function of the path length. At higher frequencies, the skin effect causes the current to flow in a much thinner region of the

trace, at or near the surface. The rougher the surface is, the longer and therefore more resistive will be the signal path.

  

The approximate skin depth of copper is:

Skin Depth (cm) = or Skin Depth (inch) =

  It is also known that there will be considerably more current flow in the surface closest to the reference plane. So, when designing the stackup, try to make the reference plane the layer above the trace rather than the layer below the trace. This will concentrate the current in the top of the trace, which is smoother and therefore shorter. The surface of the copper bonded to the laminate can be extremely rough, and this makes the signal path a lot longer. Use of rolled copper laminates would also help to mitigate the loss due to skin effect, because the bonded edge of the copper is smoother. Many laminate manufacturers are now also offering materials with very much smoother surfaces at the junction between the copper and the base material in an effort to mitigate the skin affect as much as possible. Because material selection is often driven by the RF electrical engineer, or by cost factors, it is something the layout designer does not always control. However, understanding the different materials and when to utilize them can allow the layout designer to make valuable recommendations.

  Figure 1. Cross Section Of Current Flow At low And High Frequencies Showing Skin Effect.

Return Loss Or VSWR

  A full discussion of return loss and Voltage Standing Wave Ratio (VSWR) would easily be the subject of an entire book by itself. A detailed examination would involve a large amount of very complex mathematics to explain what becomes quite a dynamic issue, when changing signal frequencies and amplitudes, along with transmission line characteristics, variable source and load impedances and skin effect are all combined. Such a discussion is beyond the scope of this guideline, and is actually more in the engineering domain than in the circuit board design domain. Usually the most significant contributor to loss in an RF design is return loss. This is the loss caused by mismatch between the output impedance of a driving source, the characteristic impedance of the connecting transmission line, and the input impedance of the receiving load. This discussion assumes a voltage source with a purely resistive output impedance providing a single frequency sine wave into a purely resistive line and load. There are a limited number of things that a layout designer can do to either cause or help resolve return loss and VSWR issues.

  Impedance is a frequency dependent quantity. This means the characteristic impedance of the transmission line and the source and load impedances will vary with frequency. When a signal travels along a transmission line and then arrives at the load, if there is a mismatch between the characteristic impedance of the transmission line and the impedance of the load, then a portion of the signal will be reflected back along the transmission line towards the source. The polarity and magnitude of the reflected signal depends on whether the load impedance is higher or lower than the line impedance: (assume that the source and line impedances are perfectly matched.) If the load impedance exactly matches the line impedance then there is maximum power transfer to the load and there is zero reflection. (Ideal situation that virtually never happens).

  If the load is an open circuit, there will be a voltage reflection of equal amplitude from the open circuit end of the line reflected back towards the source, and this voltage will be in phase with the incident wave. This reflected voltage will add to the incident wave originally propagated on the line, effectively doubling the voltage on the line. When the reflected voltage reaches the source it will be absorbed by the source impedance and the whole line will settle at the source voltage. If the load is a short circuit there will be a voltage reflection of equal amplitude from the short circuit end of the line reflected back towards the source, and this voltage will be opposite phase to the incident wave. This reflected voltage will subtract from the incident wave originally propagated on the line and, when the reflected wave reaches the source, the voltage at the output of the source will be zero (and the source generator device will likely be broken!). If the load impedance is higher than the line impedance then there will be a voltage reflection back will be a function of the ratio of the line impedance to the load impedance. Because the reflected wave is in phase with the incident wave it will add to the incident wave originally propagated on the line. When the reflected voltage reaches the source, it will be absorbed by the source impedance.

  Figure 2. Voltage Reflection Where Load Impedance Is Higher Than Line Impedance.

  If the load impedance is lower than the line impedance then there will be a voltage reflection back towards the source which will be opposite phase to the original source signal and the amplitude of the reflection will be a function of the ratio of the line impedance to the load impedance. This reflected voltage will subtract from the incident wave originally propagated on the line.

  

Figure 3. Voltage Reflection Where Load Impedance Is Lower Than Line Impedance.

  The amplitude of the reflected wave relative to the incident wave is known as the Reflection Coefficient. ( ) And is calculated as:

  

Where = reflected voltage and = incident voltage

  This is equivalent to

Where = load impedance and = transmission line characteristic impedance.

  Now, assume a transmission line with non-matched load impedance is being driven with a continuous single frequency sine wave and the line is of such length that the signal takes many full cycles to reach the end of the line: Since any transmission line has an associated propagation delay, the phase of the reflected wave with respect to the incident wave is continually changing. The total amount of initial phase change relative to the incident wave will be dependent on the length of the transmission line and the frequency of the wave. Because of this, there will be some points along the line where the incident wave and the wave will subtract from the incident wave. The points where the incident and reflected waves are in phase and opposite phase are the points where maximum and minimum amplitude will appear on the line. The maximum and minimum amplitude points will alternate along the line. If the frequency stays constant, then this condition will become stable and the combined wave, the incident wave plus the reflected wave, will appear to be stationary on the line. This is known as a Standing Wave.

  Of course, in the real world the frequency and amplitude of the incident wave and the reflected wave is continuously changing, as is the phase relationship between them. The resulting incident plus/minus reflected wave at any given point along the line is still known as the standing wave. The relationship between the standing wave and the incident wave is known as the Standing Wave Ratio (SWR), or commonly the Voltage Standing Wave Ratio (VSWR), given as:

Where = reflection coefficient.

  If the source impedance and the line impedance are not matched, then the reflected wave will not be completely absorbed by the source impedance and there will be another reflection generated in the forward direction from the source towards the load. This is essentially what causes ringing.

  There are two issues of major significance caused by high return loss. The reflections, and likely ringing, add noise to the system. This degrades the quality of the original signals and can make it harder for the receiving device to distinguish the intended signal from the noise. This can significantly reduce system performance while at the same time increasing system EMI issues.

  Reflected power does not get absorbed in the load. This loss in power reduces system efficiency and performance. If the load is an antenna then the output power delivered to the antenna will be less than intended Where does the lost energy go.

  

The reflected power does not simply disappear, it has to go somewhere. The energy is most often lost in the form of heat or

radiated emissions. Energy lost in the form of heat can cause damage to components. Energy lost in the form of radiated

emissions can easily cause the system to either fail completely, or fail to meet relevant emissions standards.

  For RF design, return loss is likely the most significant issue a layout designer will face. From the layout designer’s perspective, the goal is to minimize or completely remove impedance mismatches that occur as the result of layout decisions or incorrect impedance models being used. There are a number of very significant ways you can do this, which are shown later in the guideline.

Noise / Coupling / EMI / Shielding

  Analog and RF circuitry is particularly sensitive to noise and this needs to be managed by controlling coupling and EMI as much as possible. Within the RF circuit, keeping the physical loop areas of both signal and power circuitry as small as possible will certainly help with this. Large loop areas are antennae and will radiate much more than small loop area circuits. This is usually fairly easy to control with a number of methods: giving more attention to component orientation and placement in the signal path, carefully and deliberately dividing the analog circuit into separate functional blocks, keeping power supply bypassing as close as possible to the device, and using wider, lower inductance traces for power connections. One of the most effective ways to reduce EMI and EMC issues is by adding shields around sensitive circuits to help keep noise out, or around noisy circuits to help contain radiated noise emissions.

  With digital designs, the faster the rise time of the digital signals, the more harmonic frequencies are present. If noise at these frequencies finds its way into analog and RF circuits on the same board, or in the same system, then the results can be disastrous for the RF circuits. Digital noise can be induced in an analog circuit either by conductive coupling or electromagnetic coupling.

  Conductive coupling occurs most often by way of shared power supplies where digital noise is present on the power rail, and then that same power is used to supply an analog circuit without the necessary amount of filtering or isolation. Digital noise can also be conductively coupled by means of digital signals that are used to control some of the RF devices. These signals, often derived from FPGA and other high speed digital processing devices, will often have unnecessarily fast edge rates. Such signals, (Enable, Select, MUX Addresses, etc.) are for mode and configuration changes and are fairly static in nature, and the RF device does not normally need these to be fast edge rate signals. It is always good to isolate these with opto-electronics or buffers with the RF device side having as slow a rise time as allowed by the RF device. Another method of slowing the edge rate on otherwise static signals is to add a very high value resistor to the driver output (hundreds of Ohms up to 1k Ohm).

  Electromagnetic coupling is usually in the form of radiated emissions from the high speed digital circuits which finds its way into the analog circuits by way of proximity. This is most easily controlled by maximizing the distance between the two circuit domains, and the use of grounded shielding boxes around the sensitive analog circuitry.

  An analog circuit typically contains many stages of amplification, some of which may have high gain. Any level of noise seen on the amplifier inputs, in the operating frequency range of the amplifier, will be amplified and will exist at much higher levels at the device output. A higher level of noise like this radiate a lot more and that can cause EMC issues.

  

Layout designers need to be aware of these issues and take every possible precaution to keep the digital and RF circuits isolated from

each other as much as possible, and there are many ways to achieve this goal.

Clean Power Delivery

  Providing clean power to an RF circuit is extremely important because noise on the power supplies of an amplifier, for example, may be amplified and appear at a considerably higher level at the output. It may also cause circuits to resonate if the noise is of just the right frequency. Clean power includes clean ground, and in analog designs this is particularly important. Many analog and RF circuits are very sensitive to the absolute voltage of a signal relative to zero, and if ground is offset due to noise or excessive inductance in the ground path then circuits may behave in an incorrect manner as a result. Most designs today will have one or more main switching regulators very near the power input connectors, and these regulators will provide the main, board-wide input voltage to other regulators and usually the global digital power supply. For example, the main input power may be 24 Volts -- usually filtered right at the input connector. There may be a high current switching regulator to provide maybe 12 Volts for distribution around the board, where it is used as the input to multiple regulators providing various voltages for use at each specific circuit. Also located near the power input there will often be another high current switching regulator to provide the global digital voltage for the board, typically 3.3 Volts or 5.0 Volts. The outputs of both these, and possibly other global voltage regulators located at the power input area, need to be thoroughly filtered before these voltages are distributed around the board. There should be a range of different value capacitors at the outputs of these power supply circuits to remove any switching spikes caused by the regulators themselves. Then these clean global voltages can be safely distributed around the board to local regulators and filters. Switching regulators can easily generate a large amount of electromagnetic noise when the layout is not done correctly, so it is important for both layout designers and electrical engineers to have a good understanding of the circuit involved and where the energy resides in the circuit in order to ensure there is minimum noise generated due to poor layout implementation. The first point of reference is usually the manufacturer’s datasheet for the device. Layout designers need to be careful when applying these manufacturer guidelines however, and not just blindly implement what is done in the example layout from the datasheet. Most component manufacturers do not have their reference designs EMI tested, and these reference designs, while they may well function as intended in isolation, may also be the source of serious EMI issues either by themselves or when included on a circuit board with many other circuits of different technologies. Complete understanding of the circuit and the critical current paths allows layout designers to produce at least as good, usually better results, both in terms of individual circuit functionality and the entire design which may be made up of many different circuits operating together on the same board.

  It is also unlikely that the manufacturer’s recommended layout will fit in a particular design exactly the same way it appears in the layout guideline, typically due to physical area constraints or different component selections, or both. This is not usually an issue as long as the key principles and written recommendations are followed. Layout designers would be better served by reading and

  

understanding the device functional descriptions in the manufacturer’s datasheets and then applying

  that knowledge, along with the understanding of where the energy in the circuit is, and referencing the sample layout in the guidelines, when implementing the printed circuit board layout. Most any circuit can be placed in a different manner and still meet all the specified guidelines. There may very well be other high current low voltage switching regulators in the design, typically for FPGA and microprocessor core voltages of around 0.9 Volts – 1.2 Volts and maybe for DDR memory at 1.2 Volts or 1.8 Volts. It is best to locate these device specific switching regulators as close to the load circuits as reasonable, making it less likely you will be carrying switching regulator noise over larger areas of the design unnecessarily. It also makes the plane areas for these voltages smaller and therefore less resistive and less inductive. The design of split planes is also simplified, because these localized individual planes use less space, leaving more usable space for other voltage planes on the same layer(s). Care must be taken in doing this though, it is much more important to keep these switching regulators for digital circuitry physically away from analog circuits than it is to have them close to the digital circuit that uses them.

  A typical RF design will likely be broken up into separate sections, often in separate shielded ‘rooms’ within the RF area of the board. It is quite common for each of these RF sub circuits to be powered by local linear regulators. Linear regulators are used for these circuits because they are a lot less noisy than switching regulators. These regulators would be placed as near to the circuit they are providing power to as possible, often on the bottom of the board right behind the circuit. The input to these local regulators may be the distributed 12 Volts generated by the main switching power supply located near the power input. When connecting the output of this local regulator to the load circuit, even though it may be tempting to use planes, the layout designer needs to be aware that a copper right size and shape. This small plane shape could easily resonate and cause significant EMI radiation. When there is a global or reasonably large power plane this is not an issue because the plane area is too large. Very small plane shapes used for a single device though, may be of a small enough size to be an issue. The presence of a large global ground plane on the adjacent layer can make the patch antenna issue even worse, as the size of the ground plane relative to the small power shape (patch area) will considerably alter the effective resonant frequency and gain of the patch antenna. When a local regulator is used to supply power to a single device in an RF circuit ‘room’, it is usually better to use a wide, low inductance trace to route the power rather than a very small shape on a plane layer.

  In reality, power planes are simply not often necessary for analog and RF designs. This is because there is usually a pi filter, which includes several values of capacitors, which should be placed as closely as possible to the power pins of the device. This filter is designed to provide clean power through a low impedance path at the frequency of operation of the circuit. It is only necessary to get power to the filter circuit and all the high frequency noise should be filtered and clean power delivered to the actual device. The connection to the input side of the filter can be made using a plane if the input is a global voltage, or with a trace of sufficient width to provide the necessary current without introducing voltage drop or temperature rise if the supply voltage is local to only one or a few circuits. The connection from the output of the filter to the device pin or pins should be a trace as wide as practicable and preferably on the same layer as the device. If that cannot be achieved due to density on the surface layers, then the power trace can be created on an internal layer and connected to the device power pins with vias as close to the pins as possible, preferably using multiple vias to stitch to the internal layer trace. Connecting power to RF circuits using surface or internal layer traces in this manner will also have the advantage of leaving more internal plane space for Ground or even reducing the overall number of layers in the design.

  Figure 4. Power Implemented As A Wide Trace.

  Figure 5. Power Implemented As A Local Plane - Potential Patch Antenna. This is quite different to the situation in a digital design where power/ground plane pairs with increased inter-plane capacitance, along with a good distribution of multiple values of decoupling capacitors, are required to deliver energy across the broad range of harmonic frequencies commonly found in digital circuits. Individual electrical engineers, or even ‘company policy’ may dictate the use of planes for all power connections. This is definitely not preferred in analog and RF circuits, and can even be the cause of some serious issues, so layout designers should discuss the issue with the relevant engineering personnel and arrive at a solution best for the design.

  

A Few things Before Starting The Design

The Schematic And Mechanical Drawings

  The design process usually starts with a detailed review of the engineering schematic and the mechanical specification for the board This is done so the layout designer has a good understanding of the ‘flow’ of the design. It is much easier to see this with analog and RF circuits than with digital circuits, because of the way the schematic is normally drawn. It is usually a quite linear flow with few connections going between schematic sheets, which tend to be the RF signals into and out of the circuit block, Local Oscillator (LO) and Intermediate Frequency (IF) signals to mixers, and often some digital control signals. A digital schematic usually has multiple large, high pin count symbols on the same sheet with often hundreds of connections going into and out of the sheet, making a circuit flow very difficult to see. The mechanical drawing and constraints are vital to seeing the flow of the design before a single part is placed. You need to know where the signals are coming into and out of the board, where all the input and output connectors, the main power input connectors and any switches and indicators need to be. These will all have a significant effect on your placement strategy. Is there a combination of switching regulators and linear regulators in the design? If so, place the main switching regulator near the power connector, keeping the input power to the board as short as possible. In most systems the mechanical design is quite sensible and proximity of input and output connectors has been carefully considered. For example, the main RF signal input which is usually from an antenna is not likely to be placed near the main power input. This RF input signal is extremely low voltage and is very sensitive to any noise. Placing the main power input filters, or a higher level RF output driver, anywhere near this sensitive input circuit would create some significant isolation problems for layout.

The Circuit Blocks

  The next step, and a very important one, is to group all the parts based on schematic circuit blocks. This is done on all design types, but for RF designs it can be even more useful. Some of the parts in an RF circuit can be very large, devices such as filters, splitters, mixers etc. can often be inches in size. The RF part of the design is very likely going to be broken into multiple smaller circuit blocks with each one placed in an isolated room with shield walls around them, so the layout designer needs to see just what components are in each circuit block to have a good appreciation of how much space that block is going to require.

  Using blocks to visualize circuit flow.

  

Remember, any given block will need to take input from and provide output to other associated blocks so it is important to be

able to visualize this signal flow as clearly as possible before starting the component placement.

  During this stage the layout designer should also be doing a mental review of the schematic. For example, one useful technique is to color unconnected pins and nets in the CAD tool white, because this makes it very obvious when some errors or omissions exist in the schematic. If there is a large white copper area under one of the RF filter parts, or the large thermal pad of a QFP device, or one of the pins of a resistor, capacitor, inductor or diode for example, then it is immediately obvious that this is a schematic omission which should reported back to the electrical engineer.

  By the time this pre-layout review process is completed, the layout designer should have a good idea of what the completed design will look like, now it is simply a process of placing the parts and routes where it is already pretty much known they will be.