Department of Electrical Engineering ELE
Department of Electrical Engineering
ELEC 345 - Digital Logic Design - Lab
Experiment No. 2
NAND & NOR APPLICATION
Students Name:
IDs
Mariam Mohammed Askar
201108472
Ahlam khamis Al Ghamari
201206005
Instructor:
Eng. Walid Omar Shakhatreh
Prelab
Introduction
NAND and NOR gates are two basic logic gates. NAND gate or Not-AND
gate is a combination of the two separate logical functions, the AND
function and the NOT function connected together in series. Like the NAND
Gate, the NOR or Not OR Gate is also a combination of two separate
functions, the OR function and the NOT function connected together in
series. NAND and NOR gates can be used in different implementations and
for any logic expressions. They can be used to build any other chips or
circuits. For example, NOT, OR and AND gates can be made by different
arrangement of NAND and NOR gates.
The objectives of this experiment were basically to understand the
power of NAND and NOR gates in building other gates and then be able to
think of any other logic combinations.
Objective
The purpose of this experiment is to familiarize the students with
the function of the basic logic gates used in the Digital Logic Design
course. Students will be familiarized with AND, OR, NOT, NAND, NOR
and XOR gates. Students must also differentiate between chips & gates.
Method
Equipment
One 7400 Quad-2input NAND chip.
One 7402 Quad-2input NOR chip.
One 7410 Triple-3input NAND chip.
One 7427 Triple-3input NOR chip.
Test board.
Two switches.
One Led.
DMM.
Wires.
Cutter.
A TTL 74xx series Datasheet catalogue.
Procedure
Result and discussion
In the first procedure, a 7400 NAND chip was used. The inputs of
the chip were connected to switches to implement the various cases
of the inputs. Table (1) shows the results based .
Inp
ut
A
0
1
Outp
ut
C
1
0
Table (1) shows that the output of the NAND chip is
one if the one input is logic (0), otherwise the output is
logic (1). Figure (1) showsFigure
the LED
ON of theofone input of 0 .
(1): Connection
Table (1): Truth table of
NAND chip
NAND chip with inputs of
0.
In the next procedure, an 7400 NAND chip was placed in the test
board and three NAND gates were connected .
Input
A
0
0
1
1
B
0
1
0
1
Outp
ut
C
0
1
1
1
Table (2): Truth table of NAND chip with
3 NAND gates
Figure (2): Connection of
NAND chip with inputs of
0 and 0.
In the next step, an 7400 NAND chip was placed in the test board. Four
NAND gates were connected .The inputs were connected to switches to
view different cases of the inputs. The output of this circuit is logic (1) if
and only if one of the inputs is logic (1). That means if the inputs had
the same logic, the output will be logic (0) as it is in figure (3).
Outp
ut
A B
C
0 0
0
0 1
1
1 0
1
1 (3):1Truth table
0
Table
of
Input
NAND chip with 4 NAND
gates
Figure (3): Connection of
NAND chip with inputs of
1 and 1.
Another chip was tested with different cases which is NOR chip. NOR
chip is an inverter of OR chip. The circuit was connected with four NOR
gates. The inputs were connected to switches to view different cases of
the inputs. The circuit produced an output that is similar to NAND chip .It
has an output of logic (0) if both of the inputs are logic (1). Table (4) lists
the cases of NOR chip.
Input
A
0
0
1
1
B
0
1
0
1
Outp
ut
C
1
1
1
0
Table (4): Truth table of
NOR chip with 4 NOR gates
Figure (4): Connection of
In the next step, a 7402 NORNOR
chip
placed
chipwas
with inputs
of in
1 the test board. Four
and 1.
NOR gates were connected .The
inputs were connected to switches to
view different cases of the inputs. The output of this circuit is logic (0) if
and only if one of the inputs is logic (1). That means if the inputs had
the same logic, the output will be logic (1) as it is in figure (5).
Input
A
0
0
1
1
B
0
1
0
1
Outp
ut
C
1
0
0
1
Table (5): Truth table of NOR
chip with 4 NOR gates.
Figure (5): Connection of
NOR chip with inputs of 1
and 0.
Conclusion:
To sum up, the experiment was very useful and successful. It
teaches the power of NAND and NOR gates in building other gates.
Two types of chips were used in this experiment which are NAND and
NOR chips and we find that from two chip, we can build any other chip or
circuit. Finally, after doing the experiment we found that our assumptions
in the pre-lab were correct.
Reference:
Digital logic design manual.
ELEC 345 - Digital Logic Design - Lab
Experiment No. 2
NAND & NOR APPLICATION
Students Name:
IDs
Mariam Mohammed Askar
201108472
Ahlam khamis Al Ghamari
201206005
Instructor:
Eng. Walid Omar Shakhatreh
Prelab
Introduction
NAND and NOR gates are two basic logic gates. NAND gate or Not-AND
gate is a combination of the two separate logical functions, the AND
function and the NOT function connected together in series. Like the NAND
Gate, the NOR or Not OR Gate is also a combination of two separate
functions, the OR function and the NOT function connected together in
series. NAND and NOR gates can be used in different implementations and
for any logic expressions. They can be used to build any other chips or
circuits. For example, NOT, OR and AND gates can be made by different
arrangement of NAND and NOR gates.
The objectives of this experiment were basically to understand the
power of NAND and NOR gates in building other gates and then be able to
think of any other logic combinations.
Objective
The purpose of this experiment is to familiarize the students with
the function of the basic logic gates used in the Digital Logic Design
course. Students will be familiarized with AND, OR, NOT, NAND, NOR
and XOR gates. Students must also differentiate between chips & gates.
Method
Equipment
One 7400 Quad-2input NAND chip.
One 7402 Quad-2input NOR chip.
One 7410 Triple-3input NAND chip.
One 7427 Triple-3input NOR chip.
Test board.
Two switches.
One Led.
DMM.
Wires.
Cutter.
A TTL 74xx series Datasheet catalogue.
Procedure
Result and discussion
In the first procedure, a 7400 NAND chip was used. The inputs of
the chip were connected to switches to implement the various cases
of the inputs. Table (1) shows the results based .
Inp
ut
A
0
1
Outp
ut
C
1
0
Table (1) shows that the output of the NAND chip is
one if the one input is logic (0), otherwise the output is
logic (1). Figure (1) showsFigure
the LED
ON of theofone input of 0 .
(1): Connection
Table (1): Truth table of
NAND chip
NAND chip with inputs of
0.
In the next procedure, an 7400 NAND chip was placed in the test
board and three NAND gates were connected .
Input
A
0
0
1
1
B
0
1
0
1
Outp
ut
C
0
1
1
1
Table (2): Truth table of NAND chip with
3 NAND gates
Figure (2): Connection of
NAND chip with inputs of
0 and 0.
In the next step, an 7400 NAND chip was placed in the test board. Four
NAND gates were connected .The inputs were connected to switches to
view different cases of the inputs. The output of this circuit is logic (1) if
and only if one of the inputs is logic (1). That means if the inputs had
the same logic, the output will be logic (0) as it is in figure (3).
Outp
ut
A B
C
0 0
0
0 1
1
1 0
1
1 (3):1Truth table
0
Table
of
Input
NAND chip with 4 NAND
gates
Figure (3): Connection of
NAND chip with inputs of
1 and 1.
Another chip was tested with different cases which is NOR chip. NOR
chip is an inverter of OR chip. The circuit was connected with four NOR
gates. The inputs were connected to switches to view different cases of
the inputs. The circuit produced an output that is similar to NAND chip .It
has an output of logic (0) if both of the inputs are logic (1). Table (4) lists
the cases of NOR chip.
Input
A
0
0
1
1
B
0
1
0
1
Outp
ut
C
1
1
1
0
Table (4): Truth table of
NOR chip with 4 NOR gates
Figure (4): Connection of
In the next step, a 7402 NORNOR
chip
placed
chipwas
with inputs
of in
1 the test board. Four
and 1.
NOR gates were connected .The
inputs were connected to switches to
view different cases of the inputs. The output of this circuit is logic (0) if
and only if one of the inputs is logic (1). That means if the inputs had
the same logic, the output will be logic (1) as it is in figure (5).
Input
A
0
0
1
1
B
0
1
0
1
Outp
ut
C
1
0
0
1
Table (5): Truth table of NOR
chip with 4 NOR gates.
Figure (5): Connection of
NOR chip with inputs of 1
and 0.
Conclusion:
To sum up, the experiment was very useful and successful. It
teaches the power of NAND and NOR gates in building other gates.
Two types of chips were used in this experiment which are NAND and
NOR chips and we find that from two chip, we can build any other chip or
circuit. Finally, after doing the experiment we found that our assumptions
in the pre-lab were correct.
Reference:
Digital logic design manual.