TELKOMNIKA ISSN: 1693-6930
Investigation Study of Three-Level Cascaded H- bridge Multilevel… Mohd Ruddin Ab Ghani
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Figure 30. Output line voltage of three-levels DCMLI using SPWM
Figure 31. THD of line voltage of three-level DCMLI
5. Results Analysis
Table 1 shows the tabulated value of inverter output Line voltage THD with respect to the number of output levels of CHMLI Cascaded H-bridge Multilevel Inverter.
Table 1. The tabulated value of inverter output voltage THD with parameters variation
Number of level SPWM
SVPWM 2
58.10 56.49
3 45.17
40.88
Figure 32. THD Analysis
The THD value is tabulated in Table 1 and the graph in Figure 33. The THD of the inverter was reduced if the inverter was controlled using space vector pulse width modulation. A
reduction from 45.17 when using sinusoidal pulse width modulation SPWM to 40.88 when using the SVPWM was observed, indicating that the Space vector modulation technique is the
best solution in terms of output voltage, harmonic losses and number of switching per cycle.
As the aim of this paper was to propose different multilevel inverter topologies and compare them in terms of different aspects, Table 2 shows the comparison among the three
MLI topologies.
Table 2. Comparisons between MLI topologies
Inverter type No.level
Carrier frequency THD
Modulation techniques CHMLI
3 10000
45.17 SPWM
DCMLI 3
10000 46.99
SPWM FCMLI
3 10000
46.18 SPWM
ISSN: 1693-6930
TELKOMNIKA Vol. 15, No. 1, March 2017 : 125
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Figure 33 shows the THD graph for three different multilevel topologies. Hence, the CHMLI has the lowest THD among the topologies. Table 3 shows the comparison between
MLI topologies in terms of components used for three-level inverter.
Figure 33. THD Analysis Graph
Table 3. Number of Components used in Each MLI Topology
Inverter type Number of switches Numbers capacitors Number of diodes Total of components
CHMLI 12
12 DCMLI
12 2
6 20
FCMLI 12
12 24
Based on the information tabulated above and the THD curve, the CHMLI has the best THD compared to other topologies. Besides, it utilizes the fewest semiconductors devices
where it neither requires any clamping diode nor balancing capacitor. In addition, the CHMI is the easiest topology in terms of circuit complexity especially when implementing higher inverter
levels.
6. Conclusion
