Describe how computer engineering uses or benefits from electronics.

Appendix A - Body of Knowledge 2004 December 12 Electronics CE-ELE CE-ELE0 History and overview [core] CE-ELE1 Electronic properties of materials [core] CE-ELE2 Diodes and diode circuits [core] CE-ELE3 MOS transistors and biasing [core] CE-ELE4 MOS logic families [core] CE-ELE5 Bipolar transistors and logic families [core] CE-ELE6 Design parameters and issues [core] CE-ELE7 Storage elements [core] CE-ELE8 Interfacing logic families and standard buses [core] CE-ELE9 Operational amplifiers [core] CE-ELE10 Circuit modeling and simulation [core] CE-ELE11 Data conversion circuits [elective] CE-ELE12 Electronic voltage and current sources [elective] CE-ELE13 Amplifier design [elective] CE-ELE14 Integrated circuit building blocks [elective] CE-ELE0 History and overview [core] Minimum core coverage time: 1 hour Topics: ƒ Indicate some reasons for studying electronics ƒ Highlight some people that influenced or contributed to the area of electronics ƒ Indicate some important topic areas such as material properties, diodes and transistors, storage elements, interfaces and buses, operational amplifiers, and circuit simulators ƒ Contrast the meanings transistors and diodes ƒ Mention some issues and parameters in electronics design ƒ Describe the difference between an ordinary amplifier and an operational amplifier ƒ Mention the importance of data conversion and the circuits for doing the same ƒ Indicate some circuit simulators and contrast the advantages of each ƒ Explore some additional resources associated with electronics ƒ Explain the purpose and role of electronics in computer engineering Learning outcomes: 1. Identify some contributors to electronics and relate their achievements to the knowledge area. 2. Describe a transistor and its functionality. 3. Identify some storage elements. 4. Articulate the purpose of buses. 5. Indicate the importance of designing data conversion circuits. 6. Identify two software products used for designing and simulating circuits.

7. Describe how computer engineering uses or benefits from electronics.

CE-ELE1 Electronic properties of materials [core] Minimum core coverage time: 3 hours Topics: ƒ Solid-state materials ƒ Electrons and holes ƒ Doping, acceptors and donors ƒ p- and n-type material ƒ Conductivity and resistivity ƒ Drift and diffusion currents, mobility and diffusivity Learning outcomes: 1. Indicate the properties of materials that lead to be useful for the construction of electronic circuits, giving reasons. 2. Explain the uses of one particular material as opposed to alternatives to serve a stated purpose. - A.38 - Appendix A - Body of Knowledge 2004 December 12 CE-ELE2 Diodes and diode circuits [core] Minimum core coverage time: 5 hours Topics: ƒ Diode operation and i-v characteristics ƒ Regions of operation, models, and limitations ƒ Schottky, Zener, variable capacitance diodes ƒ Single diode circuits, the load line ƒ Multi-diode circuits ƒ Rectifiers ƒ dcdc converters ƒ Diode logic: AND and OR functions Learning outcomes: 1. Explain the properties of diodes. 2. Outline the use of diodes in the construction of a range of circuits including rectifiers, acdc converters, and common logic functions. CE-ELE3 MOS transistors and biasing [core] Minimum core coverage time: 3 hours Topics: ƒ NMOS field-effect transistor operation ƒ i-v characteristics ƒ Regions of operation, models, and limitations ƒ Enhancement and depletion-mode devices ƒ PMOS devices ƒ Transfer characteristic of FET with load resistor ƒ Biasing for logic and amplifier applications Learning outcomes 1. Indicate the areas of use of NMOS, PMOS, CMOS, and dynamic logic families. 2. Demonstrate the ability to implement a range of logic functions using each of NMOS, PMOS, CMOS, and dynamic logic. CE-ELE4 MOS logic families [core] Minimum core coverage time: 7 hours Topics: ƒ Logic level definitions ƒ NMOS logic design: Inverter, NOR, NAND, SOP, POS, complex gates ƒ PMOS logic ƒ CMOS logic: Inverter, NOR, NAND, SOP, POS, complex gates ƒ Dynamic logic ƒ CVS logic ƒ Cascade buffers ƒ NMOS and CMOS powerdelay scaling Learning outcomes 1. Explain the differences between the different MOS logic families. 2. Articulate the advantages of dynamic logic. - A.39 - Appendix A - Body of Knowledge 2004 December 12 CE-ELE5 Bipolar transistors and logic families [core] Minimum core coverage time: 4 hours Topics: ƒ npn and pnp transistor operation ƒ i-v characteristics ƒ Regions of operation, models, and limitation ƒ Transfer characteristic of BJT with load resistor ƒ Biasing for logic and amplifier applications ƒ Logic level definitions ƒ The differential pair as a current switch ƒ Transistor-transistor logic – inverters, NAND, other functions ƒ Emitter-coupled logic – ORNOR gate, other functions ƒ Low voltage bipolar logic families Learning outcomes: 1. Indicate the areas of use of bipolar logic families. 2. Demonstrate the ability to implement a range of logic functions using bipolar logic. CE-ELE6 Design parameters and issues [core] Minimum core coverage time: 4 hours Topics: ƒ Switching energy, power-delay product comparison, ƒ Propagation delay, rise time, fall time ƒ Fan-in and fan-out ƒ Power dissipation, noise margin ƒ Power supply distribution ƒ Sources of signal coupling and degradation ƒ Transmission line effects; passive, active, dc and ac termination ƒ Element tolerances ƒ Worst-case analysis of circuits ƒ Monte Carlo analysis ƒ Monte Carlo analysis in SPICE ƒ Six-sigma design Learning outcomes: 1. Incorporate design strategies in power distributions and transmission. 2. Apply methods to minimize noise and other signal degradations. CE-ELE7 Storage elements [core] Minimum core coverage time: 3 hours Topics: ƒ Latches ƒ Flip-flops ƒ Static RAM cells ƒ Dynamic RAM cells ƒ Sense amplifiers Learning outcomes: 1. Compare and contrast the properties of different kinds of storage element to serve different purposes. 2. Select with reasons appropriate kinds of storage elements for use in a range of possible devices. - A.40 - Appendix A - Body of Knowledge 2004 December 12 CE-ELE8 Interfacing logic families and standard buses [core] Minimum core coverage time: 3 hours Topics: ƒ Terminal characteristics of various logic families ƒ Standard interface characteristics ƒ Level translations: TTLCMOS, TTLECL, CMOSECL ƒ Single-ended to differential and differential to single-ended conversion ƒ Transmission line characteristics, reflections ƒ Bus termination: Passive, active, dc, ac ƒ 4-20 mA current interfaces ƒ RS-XXX buses ƒ IEEE-XXXX buses ƒ Low-level differential signaling ƒ RAMBUS ƒ DDR Learning outcomes: 1. Explain the practical difficulties resulting from the distribution of signals. 2. Explain ways to overcome these difficulties when interfacing different logic families. CE-ELE9 Operational amplifiers [core] Minimum core coverage time: 4 hours Topics: ƒ Ideal op-amps and circuit analysis ƒ Ideal op-amp circuits: Inverting and non-inverting amplifiers, summing and difference amplifiers, integrator, low pass filter ƒ Non-ideal op-amps: dc errors, CMRR, input and output resistances, frequency response, output voltage and current limitations ƒ Circuits with non-ideal amplifiers ƒ Multi-stage op-amp circuits Learning outcomes: 1. Explain with justification the ideal properties of operational amplifiers. 2. Design various amplifier structures and filters with ideal op-amps. 3. Understand characteristics of non-ideal op-amps. 4. Design simple circuits with them. CE-ELE10 Circuit modeling and simulation [core]