A NEW APPROACH TO STABILITY LIMIT ANALYSIS OF A SHUNT ACTIVE POWER FILTER WITH MIXED NON-LINEAR LOADS - Scientific Repository

  AUPEC2004

AUPEC 2004

  

Australasian Universities Power Engineering Conference

Brisbane, Australia

26-29 September 2004

ISBN 1-864-99775-3

  Papers sorted by Last Name of Primary Author Papers sorted by Paper IDs Program Book

Welcome

  

Welcome to the Australasian Universities Power Engineering Conference (AUPEC)

2004. The theme of this year’s conference is “Challenges and Opportunities in the

Deregulated Power Industry”. During the last year, power industries around the

world have seen a number of major blackouts. This has emphasized the importance

of security in complex and interconnected power systems. New techniques and

solutions are required to manage and operate the deregulated electricity industry

in a market environment. This conference represents the perfect forum for

presenting the strategies developed by industry and academia to meet these

challenges.

  Organising Committee ENERAL HAIR G C

  A/Prof. Tapan Kumar Saha University of Queensland UBLICATION HAIR P C

  Dr. Geoffrey Walker University of Queensland ECHNICAL HAIR T C

  Dr. Zhao Yang Dong University of Queensland EMBERS M

  Dr. Dave Allan Powerlink

  A/Prof. David Birtwhistle Queensland University of Technology (QUT) Mr. Peter Brennan Ergon Energy Mr. Tim George NEMMCO Dr. Geir Hovland University of Queensland Prof. Gerard Ledwich Queensland University of Technology (QUT) Mr. Damien Sansom University of Queensland Mr. Alok Thapar University of Queensland Mr. Zhao Xu University of Queensland

  AUPEC2004

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Australasian Universities Power Engineering Conference (AUPEC 2004) 26-29 September 2004, Brisbane, Australia

  

A NEW APPROACH TO STABILITY LIMIT ANALYSIS OF

A SHUNT ACTIVE POWER FILTER WITH MIXED NON-LINEAR LOADS

Hanny H. Tumbelaka*, Lawrence J. Borle** and Chem V. Nayar*

• Department of Electrical and Computer Engineering Curtin University of Technology, Western Australia ** School of Electrical, Electronic and Computer Engineering.

  University of Western Australia, Western Australia

  Abstract

In this paper, a new approach to evaluate the operation of a shunt Active Power Filter (APF) is

presented. The filter consists of a three-phase current-controlled voltage source inverter (CC-VSI)

with a filter inductance at the ac output and a dc-bus capacitor. The CC-VSI is operated to

directly control the ac line current to be sinusoidal and in phase with the grid voltage. The

compensation is successful if the current and voltage controller operates within the stable and

controllable area. The area boundaries are established from current control loop equations and

voltage control loop transfer function. The simulation results indicate that the new approach is

simple for analyzing the stability and controllability of the system for various loads and system

parameters. loop equations and the outer loop transfer function.

1. INTRODUCTION The stability and controllability of the system can be

  evaluated by checking whether the two loops are

Non-linear loads, especially power electronic loads, working within the boundaries. This new approach is

create harmonic currents and voltages in power simple in analysing the stability and controllability of

systems. In many cases, non-linear loads consist of the system for various loads and system parameters. combinations of harmonic voltage sources and harmonic current sources, and may contain significant load unbalance (ex. single phase loads on a three phase system).

  For many years, various active power filters (APF) have been developed to suppress harmonic currents, as well as compensate for reactive power, so that the source/grid will supply sinusoidal voltage and current with unity power factor [1, 2]. With mixed non-linear loads, it has been shown that a combined system of a three-phase line-current-forcing shunt APF with a series reactor installed at the Point of Common Coupling (PCC) is effective in compensating harmonic current sources, as well as harmonic voltage sources [3]. The filter is able to handle the load unbalanced as well. Figure 1 shows the filter

  Figure 1 Active Power Filter configuration configuration.

  2. A THREE-PHASE SHUNT ACTIVE The filter consists of two control loops, namely an

POWER FILTER

  inner control loop and an outer control loop. The inner control loop is a ramptime current control that shapes The three-phase shunt active power filter is a three- the grid currents to be sinusoidal, while the outer phase four-wire current-controlled voltage-source control loop is a simple PI control to keep the dc bus inverter (CC-VSI) with a mid-point earthed, split voltage constant and to provide the magnitude of capacitor in the dc bus and inductors in the ac output. reference current signals.

  In Figure 1, the CC-VSI is operated to directly control The active power filter is able to successfully the ac line/grid current to be sinusoidal and in phase compensate the harmonics as well as the unbalance of with the source voltage. In this scheme, the grid the non-linear loads, if the two loops are controlled in current is sensed and directly controlled to follow a stable and controllable region. The region has symmetrical sinusoidal reference signals. Hence, by boundaries/limits that are established from the inner

• + i
• 2 ( − − =

  1

  ε) produces a negative derivative of the error signal, and a negative

  − + = ε (6) A positive value of the error signal (

  (5) where ε& is: dt di dt di dt di dt d ref _{APF loads}

  ≤ ε ε &

  ref (4) To assure that the system can remain on the sliding surface and maintain perfect tracking, the following condition must be satisfied:

  ε as a controlled parameter can be defined as a sliding surface [5]. ε = i grid

  The ramptime current control has characteristics similar to a sliding mode control. Therefore, the current error signal,

  L is considered as a part of the loads.

  PCC-pk . In this case, L

  C /2 > V

  (3) where s = 1 if the upper switch is closed, and s = 0 if the upper switch is open. The switches are operated on a complementary basis. The inverter can always generate currents and the current control loop is stable as long as v

  2 )

  L v s L v dt di

  Figure 3 Current-control circuit equivalent The output current of the inverter through L inv is inv C inv PCC APF

• - i

  The performance and effectiveness of the filter are enhanced by the use of the ramptime current control technique to control the CC-VSI [4]. The principle operation of ramptime current control is based on ZACE (zero average current error). The current error signal is the difference between the actual current and the reference signal. This error signal is forced to have an average value equal to zero with a constant switching frequency. Ramptime current control maintains the area of positive current error signal excursions equal to the area of negative current error signal excursions, resulting in the average value of the current error signal being zero over a switching period. The switching period (or frequency) is also kept constant based on the choice of switching instants relative to the zero crossing times of the current error signal. In order to evaluate the current control to maintain the switching operation, the single-phase equivalent circuit as shown in Figure 3 is examined.

  Figure 2 Equivalent circuit for low order harmonics

  L provides the required voltage decoupling between load harmonic voltage sources and the PCC. Assuming that grid voltage is balanced and sinusoidal, the equivalent circuit, from the low order harmonic point of view, is shown in Figure 2.

  . Without this inductance, load harmonic voltage sources would produce harmonic currents through the line impedance, which could not be compensated by a shunt APF. Currents from the APF do not significantly change the harmonic voltage at the loads. The series inductance L

  Another important component of this system is the small-added series inductance L L

  (2) where v grid-1 is the fundamental component of the grid voltage, and k is obtained from an outer control loop regulating the CC-VSI dc-bus voltage. This can be accomplished by a simple PI control loop. This is an effective way of determining the required magnitude of active current required, since any mismatch between the required load active current and that being forced by the CC-VSI would result in the necessary corrections to regulate the dc-bus voltage.

   = k v grid-1

  loads (1) The sinusoidal line current reference signal is given by: i ref

   = i APF

  putting the current sensors on the grid side, the grid current is forced to behave as a sinusoidal current source and as a high-impedance circuit for the harmonics. By this principle of forcing the grid current to be sinusoidal, the APF automatically provides the harmonic, reactive, negative and zero sequence currents for the load, because i grid

3. CURRENT CONTROL LOOP

  value of Table 1 The boundaries of controllability in

  ε produces a positive derivative of ε. In both cases, full controllability is achieved when: A(pu)/sec with X = 1%, f = 1Hz inv

  Vc-pu Vpcc-rms-pu di di ref di ^loads < ^APF

• (7)

  0.9 0.95 1 1.05 1.1 dt dt dt

  3.1250 182.042 137.612 93.176 48.753 4.323 3.2292 214.778 170.349 125.913 81.489 37.059

3.1 The Boundaries of Controllability

  3.3333 247.390 202.960 158.530 114.100 69.670 The right side of (7) represents the boundaries or

  3.4375 280.220 235.790 191.354 146.931 102.501 limits of controllability, which are determined by the

  3.5417 312.956 268.526 224.090 179.667 135.237 switch position s (1 or 0), v , v and L (equation

  PCC C inv 3) and expressed in Figure 4 for V = 1pu, V =

  PCC-rms C-dc 3.3333 pu, X = 1%, f = 50Hz with s = 1 (upper inv

  400.000 s = 0 (lower curve). So from (7), the curve) and

  300.000 current control will force the grid currents to track the reference signals perfectly, if the di/dt of the loads

  200.000 di/dt ref

  100.000 and lower curves of the boundaries.

  3.5417 0.000

  9 V_ C 3.1250

  1 0.

  1 1.

V_ PCC

  Figure 5 The boundaries of controllability in A(pu)/sec with X = 1%, f = 1pu inv

  350 300 250 t

  200 d i/

  150 d

  100 Figure 4 The boundaries of controllability

  50 The lowest value of the upper curve has the same

  0.00

  2.00

  4.00

  6.00

  8.00 magnitude as the highest value of the lower curve. If

  X_inv(%) this limiting magnitude is considered, the relationship between v and v for

  X = 1% (0.01pu) and C PCC inv system frequency = 1Hz (= 1pu) to create the Figure 6 The boundaries of controllability in

  A(pu)/sec for various X boundaries of di/dt (per-unit value – A(pu)/sec) can be inv depicted in Table 1 and Figure 5. The reactance

  X is inv used rather than inductance L because the per-unit inv reactance is a relative value that can be compared

  3.2 The Effects of v and v Ripples C PCC across different voltage and power levels or line

frequencies. Therefore, the frequency is also v contains low order frequency ripples. The ripples

  C represent the active alternating power for each cycle expressed in per-unit value to provide the correct per-

unit di/dt. For 50Hz, 60Hz or 400Hz system, the chart of operation and the active power demand during

transient periods. Generally, the size of the dc-bus will be obtained by multiplying the value in table 1

with 50, 60 or 400. From the figure, it can be seen that capacitor is sufficient large to minimize the ripple. As

long as v /2 > V , the system is stable and the higher the

  V and the lower the V , the more C PCC-pk C PCC margin is available for di /dt. controllability can be achieved. Hence, although v load

  C contains ripple, it just has to be sufficiently large so as For

  X other than 1%, the chart will be inversely to outweigh the fluctuation of v and small inv

  PCC perturbations. proportional to the X value. Figure 6 shows the inv boundaries of controllability for different values of Ripples in the v exist due to switching actions. To X ( f = 1pu, V = 1pu, and V = 3.3333pu). PCC inv PCC-rms C-dc analyse the high-frequency ripple in v , consider the

  PCC portion of the circuit diagram in Figure 1 around the

  4. VOLTAGE CONTROL LOOP PCC (Figure 7): The outer voltage control loop employs a PI controller to adjust the gain k of the reference currents in order to maintain the desired dc bus voltage. The outer loop block diagram using an average model and considering a perfect tracking current control loop is shown in Figure 9. To obtain a smooth gain k for the dc link voltage regulator, a first order low pass filter is added to the feedback loop. The low pass filter creates a time delay T , which is related to the cut-off

  Figure 7 v ripple circuit LPF PCC frequency of the filter. di g

  (8) v − v = L g PCC g dt di

  APF v − v = L (9)

  PCC h _ inv inv dt di

  L v − v = L (10)

  PCC L L dt di g di di APF L

  (11) Figure 9 Outer loop block diagram

  = +

  dt dt dt L L g g

  From the block diagram, the stability of the system v v v

  g h _ inv L L L inv L can be evaluated through the input-output transfer v =

  PCC (12) L L g g function. The transfer function is observed primarily

  1

  due to the dynamic changing of the loads. In this case, L L inv L losses in the converter and energy stored in L are inv neglected. v = + v /2 for s = 1 and –v /2 for s = 0 h_inv C C

  K C From (12), the waveform of v can be shown in

  PCC V ( s ) s C

  C

  =

  Figure 8a. It is obvious that the ripple reduces the (13)

  I ( s ) K

  ⎛ ⎞ ⎛ ⎞

  1 C

  load f K

  boundaries of controllability, because the value of

  P

  1 K + +

  ⎜⎜ ⎟⎟ ⎜⎜ ⎟⎟

• s C T s

  1 s T

  i LPF v increases. A small high pass filter (with low ⎝ ⎠ ⎝ ⎠

  PCC losses) should be installed to eliminate the grid

• current ripple. By doing this, the ripple in v will be

  PCC V ( s ) s ( _{C LPF C} 1 s T ) K = greatly attenuated (Figure 8b).

  K K I ( s ) ^load +

• ³ _{LPF C f P}
• s CT s C s K K K ^{2 (14) C f}

  T _i where, K : gain of voltage sensor, and f

  K C : gain of the power converter due to energy balance between ac side and dc side.

  (a) The characteristic equation of this closed-loop transfer function must satisfy the following equation for stable operation [6].

  2

  2 ( s αζω )( s s 2 ζω ω ) = (15) + + + n n n where > 0

  α > 0, ζ (damping) > 0 and ω n If characteristic equation (14) is equated to equation (15), the value of the proportional gain, K and the

  P integral time constant, T of the PI controller can be i

  (b) obtained.

  2

  (

  1 2 ) C T

• 2

  ω ζ α n LPF

  K = (16) P K K

  C f K K

  C f T =

  Figure 8 v (a) with the switching ripple; i (17) PCC

  3 αζω CT n LPF