Revision 1.0 MultiMediaCardRS-MultiMediaCard Product Manual
© 2004 SanDisk Corporation 5-8
051304
in the card response indicates, by being set to 0, that the card has completed its initialization process and is ready for the next command.
5.12 Clock Control
The SPI Bus clock signal can be used by the SPI host to set the cards to energy-saving mode or to control the data flow to avoid under-run or over-run conditions on the bus. The
host is allowed to change the clock frequency or shut it down.
There are a few restrictions the SPI host must follow: •
The bus frequency can be changed at any time under the restrictions of maximum data transfer frequency, defined by the MultiMediaCardRS-MultiMediaCard.
• The clock must be running for the card to output data or response tokens.
After the last SPI bus transaction, the host is required to provide eight clock cycles for the card to complete the operation before shutting down the clock. The state of the CS signal is
irrelevant throughout this eight-clock period. The signal can be asserted or de-asserted. Various SPI bus transactions are listed below.
− Commandresponse sequence; occurs eight clocks after the card response end
bit. The CS signal can be asserted or de-asserted during the eight clocks. −
Read data transaction; occurs eight clocks after the end bit of the last data block. −
Write data transaction; occurs eight clocks after the CRC status token. •
The host is allowed to shut down the clock of a busy card. The MultiMediaCardRS- MultiMediaCard will complete the programming operation regardless of the host
clock. However, the host must provide a clock edge for the card to turn off its busy signal. Without a clock edge, the card unless previously disconnected by de-asserting
the CS signal will permanently force the dataOut line down.
5.13 Error Conditions
The following sections provide valuable information on error conditions.
5.13.1 CRC and Illegal Commands
The CRC bits provide an optional protection of all commands. If the addressed MultiMediaCardRS-MultiMediaCard CRC check fails, the COM_CRC_ERROR bit will
be set in the cards response. Similarly, if an illegal command has been received, the ILLEGAL_COMMAND bit will be set in the card’s response.
Types of illegal commands include: •
Command belongs to a class not supported by the MultiMediaCardRS- MultiMediaCard
− For example, Interrupt and IO commands
• Command not allowed in SPI Mode
• Command is not defined
− For example, CMD6
5.13.2 Read, Write and Erase Timeout Conditions
The time period after which a timeout condition for readwriteerase operations occur is card independent and ten times longer than the typical accessprogram times for these
operations given in Table 5-1. A card will complete the command within the stated time
Revision 1.0 MultiMediaCardRS-MultiMediaCard Product Manual
© 2004 SanDisk Corporation 5-9
051304
period or return an error message. If the host does not get any response within the given timeout, it ascertains that the card is not going to respond any further and will try to recover
e.g., reset module, power cycle, reject. The typical access and program times are defined in Table 5-3.
Table 5-3 Timeout Conditions
Operation Access and Program Times
Read The read access time is defined as the sum of the two times given by the CSD
parameters TAAC and NSAC. These card parameters define the typical delay between the end bit of the read command and the start bit of the data block. This number is
card dependent.
Write The R2W_FACTOR field in the CSD is used to calculate the typical block program time
obtained by multiplying the read access time by this factor. It applies to all writeerase commands e.g., SET CLEAR_WRITE_PROTECT, PROGRAM_CSD CID and block
write commands.
Erase The duration of an erase command will be order of magnitude the number of sectors
to be erased multiplied by the block write delay.
5.14 Read Ahead in Multiple Block Read Operation
