Machine architecture Case study 1 - A single-accumulator machine
4.3.1 Machine architecture
Diagrammatically we might represent this machine as in Figure 4.2. The symbols in this diagram refer to the following components of the machine ALU is the arithmetic logic unit, where arithmetic and logical operations are actually performed. A is the 8-bit accumulator, a register for doing arithmetic or logical operations. SP is an 8-bit stack pointer, a register that points to an area in memory that may be utilized as a stack. X is an 8-bit index register, which is used in indexing areas of memory which conceptually form data arrays. Z, P, C are single bit condition flags or status registers, which are set true when an operation causes a register to change to a zero value, or to a positive value, or to propagate a carry, respectively. IR is the 8-bit instruction register, in which is held the byte value of the instruction currently being executed. PC is the 8-bit program counter, which contains the address in memory of the instruction that is next to be executed. EAR is the effective address register, which contains the address of the byte of data which is being manipulated by the current instruction. The programmer’s model of this sort of machine is somewhat simpler - it consists of a number of variables in the C ++ or Modula-2 sense, each of which is one byte in capacity. Some of these correspond to processor registers, while the others form the random access readwrite RAM memory, of which we have assumed there to be 256 bytes, addressed by the values 0 through 255. In this memory, as usual, will be stored both the data and the instructions for the program under execution. The processor, its registers, and the associated RAM memory can be thought of as though they were described by declarations like TYPE BYTES = CARDINAL [0 .. 255]; typedef unsigned char bytes; PROCESSOR = RECORD struct processor { A, SP, X, IR, PC : BYTES; bytes a, sp, x, ir, pc; Z, P, C : BOOLEAN; bool z, p, c; END; }; TYPE STATUS = running, finished, typedef enum { running, finished, nodata, baddata, nodata, baddata, badop badop; } status; VAR CPU : PROCESSOR; processor cpu; Mem : ARRAY BYTES OF BYTES; bytes mem[256]; PS : STATUS; status ps; where the concept of the processor status PS has been introduced in terms of an enumeration that defines the states in which an emulator might find itself.4.3.2 Instruction set
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» compilers and compiler generators 1996
» Objectives compilers and compiler generators 1996
» Systems programs and translators
» The relationship between high-level languages and translators
» T-diagrams Classes of translator
» Phases in translation compilers and compiler generators 1996
» Multi-stage translators compilers and compiler generators 1996
» Interpreters, interpretive compilers, and emulators
» Using a high-level host language Porting a high level translator
» Bootstrapping Self-compiling compilers compilers and compiler generators 1996
» The half bootstrap compilers and compiler generators 1996
» Bootstrapping from a portable interpretive compiler A P-code assembler
» Simple machine architecture compilers and compiler generators 1996
» Addressing modes compilers and compiler generators 1996
» Machine architecture Case study 1 - A single-accumulator machine
» Instruction set Case study 1 - A single-accumulator machine
» A specimen program Case study 1 - A single-accumulator machine
» An emulator for the single-accumulator machine
» A minimal assembler for the machine
» Machine architecture Case study 2 - a stack-oriented computer
» Instruction set Case study 2 - a stack-oriented computer
» Specimen programs Case study 2 - a stack-oriented computer
» An emulator for the stack machine
» Syntax, semantics, and pragmatics
» Languages, symbols, alphabets and strings Regular expressions
» Grammars and productions compilers and compiler generators 1996
» Classic BNF notation for productions
» Simple examples compilers and compiler generators 1996
» Phrase structure and lexical structure -productions
» Semantic overtones The British Standard for EBNF Lexical and phrase structure emphasis
» One- and two-pass assemblers, and symbol tables
» Source handling Towards the construction of an assembler
» Lexical analysis Towards the construction of an assembler
» Syntax analysis Towards the construction of an assembler
» Symbol table structures The first pass - static semantic analysis
» The second pass - code generation
» Symbol table structures The first pass - analysis and code generation
» Error detection compilers and compiler generators 1996
» Simple expressions as addresses
» Improved symbol table handling - hash tables
» Macro processing facilities compilers and compiler generators 1996
» Conditional assembly compilers and compiler generators 1996
» Relocatable code compilers and compiler generators 1996
» Further projects compilers and compiler generators 1996
» Equivalent grammars Case study - equivalent grammars for describing expressions
» Useless productions and reduced grammars -free grammars
» Ambiguous grammars compilers and compiler generators 1996
» Type 1 Grammars Context-sensitive The Chomsky hierarchy
» The relationship between grammar type and language type
» EBNF description of Clang A sample program
» Context sensitivity Deterministic top-down parsing
» Terminal successors, the FOLLOW function, and LL1 conditions for non -free grammars
» Further observations Restrictions on grammars so as to allow LL1 parsing
» Alternative formulations of the LL1 conditions
» The effect of the LL1 conditions on language design
» Construction of simple recursive descent parsers
» Case studies compilers and compiler generators 1996
» Syntax error detection and recovery
» Construction of simple scanners
» LR parsing compilers and compiler generators 1996
» Automated construction of scanners and parsers
» Embedding semantic actions into syntax rules
» Attribute grammars compilers and compiler generators 1996
» Synthesized and inherited attributes
» Classes of attribute grammars
» Case study - a small student database
» Installation Input file preparation
» Execution Output from CocoR Assembling the generated system
» Case study - a simple adding machine
» Character sets Comments and ignorable characters
» Pragmas User names The scanner interface
» Syntax error recovery Parser specification
» Grammar checks Semantic errors
» Interfacing to support modules The parser interface
» Essentials of the driver program Customizing the driver frame file
» Case study - Understanding C declarations
» Case study - Generating one-address code from expressions
» Case study - Generating one-address code from an AST
» Case study - How do parser generators work?
» Project suggestions compilers and compiler generators 1996
» Overall compiler structure compilers and compiler generators 1996
» A hand-crafted source handler
» A hand-crafted scanner Lexical analysis
» A CocoR generated scanner Efficient keyword recognition
» A hand-crafted parser A CocoR generated parser
» Syntax error handling in hand-crafted parsers
» Error reporting The symbol table handler
» Other aspects of symbol table management - further types
» The code generation interface
» Code generation for a simple stack machine
» Machine tyranny Other aspects of code generation
» Abstract syntax trees as intermediate representations
» Simple optimizations - constant folding
» Simple optimizations - removal of redundant code
» Generation of assembler code
» Source handling, lexical analysis and error reporting Syntax
» The scope and extent of identifiers
» Symbol table support for the scope rules
» Parsing declarations and procedure calls
» Hypothetical machine support for the static link model
» Code generation for the static link model
» Hypothetical machine support for the display model
» Code generation for the display model
» Relative merits of the static link and display models
» Syntax and semantics compilers and compiler generators 1996
» Symbol table support for context-sensitive features
» Actual parameters and stack frames
» Hypothetical stack machine support for parameter passing
» Semantic analysis and code generation in a hand-crafted compiler
» Semantic analysis and code generation in a CocoR generated compiler
» Scope rules Language design issues
» Function return mechanisms Language design issues
» Context sensitivity and LL1 conflict resolution Fundamental concepts
» Parallel processes, exclusion and synchronization
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