RS1 SESSION6 CASTLE 6005C
A GPS Flight Computer – Michael Castle
AIAA Responsive Space Conference – Redondo Beach, CA April 2003
GPS Flight Computer Overview
1.
2.
3.
4.
5.
6.
7.
8.
GPS Flight Computer concepts
SiRFStar2e/LP Block Diagram
Flight Computer Concepts
SiRFStar2e/LP System overview
Flight computer system diagram
Test Flights
Trajectory Simulation
Sub-orbital Repeater / Imaging
application
9. Applications for GPS flight computer
10. Future Developments
GPS Flight Computer Concepts
I/O lines
SiRF GPS
Flight
control
code
Servo
Servo
Control
Control
SiRF GPS has enough processor power
to act as a flight computer for sounding
rockets (50MHz)
Controls vehicle attitude with fins
Logging, Flight Termination and recovery
1Hz/10Hz update rate requires new type
of steering algorithm vs. typical 50Hz rate
Small sounding rockets improved
performance from subsonic trajectory and
GPS attitude corrections
New applications for sounding rockets
Reduces costs of expendable stages
SiRFStar2e/LP System Diagram
2Kx32 Cache
32Kx32 SRAM
ARM7TDMI
50MHz
System Timer
Bus
Interface 16/32
Unit
ASB
GPS Engine
Track Accelerator
WAAS
Beacon
Battery
Backed RAM
Bridge
Unit
UART x 2
SPI port
GPS Flight Computer System Diagram
Up to 40 I/O lines
Telemetry
Telemetry
Transceiver
Transceiver
FlashMemory
Memory
Flash
+extraRAM
RAM
+extra
Attitude
Attitude
Sensors
Sensors
SiRFGPS
GPS
SiRF
RTC++SRAM
SRAM
RTC
IIC/ADC
IIC/ADC
SerialPort
Port
Serial
Servo
Servo
Control
Control
Test Flights
10
5
0
-5
-10
1
3
5
7
9
11
13
15
17
19
21
23
25
27
•Oscillating flight as GPS
•updating at 1Hz
•Damped oscillations
29
10
5
•When launch rail canted
•GPS recovers to vertical
0
-5
-10
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
•Future flights will
improve control loops,
and add mid-flight
corrections
SiRF GPS User Interface simplifies
implementation of flight computer
Structured s/w for easy design
User Interface into GPS code, no need to write
GPS code etc.
User tasks can be real time, as user can control
interrupts, and task scheduling
User task scheduler, 10Hz interrupt rate
Allows easy code migration, multiple tasks
running
Ground support code available
2 UARTs, SPI bus for high speed telemetry
GPIOs to control telemetry/AtoDs/etc
Spare RAM for user code, and a complex lookup
tables, matrix manipulation
Guidance Navigation and Control system
(GN&C) does not use gyros/accelerometers
Software Overview
Start-Up
Module
Interface
GPS Core
Object code
MI Events
SiRF Tasks
MI Get/Set
functions
ISR
Routines
TASKING
NMEA Protocol (I/O)
RTCM Protocol (I)
USER1 Protocol (I/O)
UART
Memory
User Tasks
UI
Event Handler
SiRF Protocol (I/O)
MI Utility
functions
Scheduler
User Interface
SRAM Access
Routines, Battery
backed RAM
Protocol Functions
Physical I/O
Device
Attitude Correction code
•Attitude Control
If ((VelNed.Vn>1)||(VelNed.Vn1)||(VelNed.Ve0.1) || (drift
AIAA Responsive Space Conference – Redondo Beach, CA April 2003
GPS Flight Computer Overview
1.
2.
3.
4.
5.
6.
7.
8.
GPS Flight Computer concepts
SiRFStar2e/LP Block Diagram
Flight Computer Concepts
SiRFStar2e/LP System overview
Flight computer system diagram
Test Flights
Trajectory Simulation
Sub-orbital Repeater / Imaging
application
9. Applications for GPS flight computer
10. Future Developments
GPS Flight Computer Concepts
I/O lines
SiRF GPS
Flight
control
code
Servo
Servo
Control
Control
SiRF GPS has enough processor power
to act as a flight computer for sounding
rockets (50MHz)
Controls vehicle attitude with fins
Logging, Flight Termination and recovery
1Hz/10Hz update rate requires new type
of steering algorithm vs. typical 50Hz rate
Small sounding rockets improved
performance from subsonic trajectory and
GPS attitude corrections
New applications for sounding rockets
Reduces costs of expendable stages
SiRFStar2e/LP System Diagram
2Kx32 Cache
32Kx32 SRAM
ARM7TDMI
50MHz
System Timer
Bus
Interface 16/32
Unit
ASB
GPS Engine
Track Accelerator
WAAS
Beacon
Battery
Backed RAM
Bridge
Unit
UART x 2
SPI port
GPS Flight Computer System Diagram
Up to 40 I/O lines
Telemetry
Telemetry
Transceiver
Transceiver
FlashMemory
Memory
Flash
+extraRAM
RAM
+extra
Attitude
Attitude
Sensors
Sensors
SiRFGPS
GPS
SiRF
RTC++SRAM
SRAM
RTC
IIC/ADC
IIC/ADC
SerialPort
Port
Serial
Servo
Servo
Control
Control
Test Flights
10
5
0
-5
-10
1
3
5
7
9
11
13
15
17
19
21
23
25
27
•Oscillating flight as GPS
•updating at 1Hz
•Damped oscillations
29
10
5
•When launch rail canted
•GPS recovers to vertical
0
-5
-10
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
•Future flights will
improve control loops,
and add mid-flight
corrections
SiRF GPS User Interface simplifies
implementation of flight computer
Structured s/w for easy design
User Interface into GPS code, no need to write
GPS code etc.
User tasks can be real time, as user can control
interrupts, and task scheduling
User task scheduler, 10Hz interrupt rate
Allows easy code migration, multiple tasks
running
Ground support code available
2 UARTs, SPI bus for high speed telemetry
GPIOs to control telemetry/AtoDs/etc
Spare RAM for user code, and a complex lookup
tables, matrix manipulation
Guidance Navigation and Control system
(GN&C) does not use gyros/accelerometers
Software Overview
Start-Up
Module
Interface
GPS Core
Object code
MI Events
SiRF Tasks
MI Get/Set
functions
ISR
Routines
TASKING
NMEA Protocol (I/O)
RTCM Protocol (I)
USER1 Protocol (I/O)
UART
Memory
User Tasks
UI
Event Handler
SiRF Protocol (I/O)
MI Utility
functions
Scheduler
User Interface
SRAM Access
Routines, Battery
backed RAM
Protocol Functions
Physical I/O
Device
Attitude Correction code
•Attitude Control
If ((VelNed.Vn>1)||(VelNed.Vn1)||(VelNed.Ve0.1) || (drift