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Design and Implementation of a Current Controller for the Parallel Operation of
Standard UPSs
Adriano S. Carvalho

A. Pina Martins

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Armando S. Araujo

Instituto de Sistemas e Robotica
Faculdade de Engenharia da Universidade do Porto - DEEC
Rua dos Bragas, 4099 Porto Codex - PORTUGAL
Abstract - The parallel operation of static inverters is, in a large

The inverters connected to the same output bus is the more
simple and versatile solution for the parallel operation [7],
[8]. It does not require the use of common power elements
such as the multiprimary transformer or the same DC bus.

The inverters can be of different ratings which becomes this
implementation to be very advantageous.
This paper emphasizes on parallel operation of inverters
with the same capacity and having similar dynamic
characteristics [9]. In this case, the instantaneous load to be
shared in each half cycle is determined by the internal
impedance of each inverter, which depends on the output
filter and on the DC filter. Similarly, the sharing of the
harmonic currents depends on the output filter. The parallel
operation regulation is a function of the control circuit. Thus,
the inverter with the smallest impedance andor the fastest
dynamic response tends to be overloaded. Nevertheless, for
inverters of the same power and from the same manufacturer
these differences are quite small reducing the mentioned
problems.

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amount of cases, the appropriated solution to achieve the high
power required by some applications or to improve system

reliability. The limited inverter capacity obliges to parallel the
individual units to obtain the nominal load power. In UPS
systems there are situations where a high reliability/availability
is required by critical loads. The parallel redundancy appears
as an immediate solution to satisfy this requirement. This paper
presents a control system for parallel operation of non
redundant UPSs based on current control. The relative phase
between the inverters is constant. Simulation results as well as
experimental ones are presented. The overall control system is
implemented on a simple and low cost platform.

I. INTRODUCTION

The parallel operation of static inverters is, in a large
amount of cases, the solution to achieve the power required
by some applications or to improve system reliability. The
limited inverter capacity, IGBT or GTO based, obliges to
parallel the system to obtain the nominal load power. In UPS
systems
there

are
situations where
a
high
reliability/availability is required by critical loads. The
parallel redundancy appears as the immediate solution to
satisfy this requirement [l], [ 2 ] .
Two or more inverters operating in parallel must satisfy
the following conditions:
frequency and phase synchronism between the output
voltages of the various inverters
output voltage and current balance.
The parallel operation of UPSs can appear in various
configurations, each one for its own purpose.
One or more inverters working in parallel with the mains
give more versatility to the inverter function: it only supplies
active power when the mains fails, it reduces the mains
current harmonic distortion, and improves the mains voltage
quality [31, [41, ~51.
A multiprimary transformer with the needed inverters

connected to the primary windings is a good solution to
obtain a high power system [SI, [6]. The inclusion of the
filter inductance in the primary winding allows a more
compact system and the control circuit is very simple.

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11. SYSTEM CHARACTERISTICS

A. Load Sharing Control Methods

The most usual methods of load sharing control are: 1active and reactive power control; 2-voltage and frequency
drooping; 3-instantaneous modulation control.
In the active and reactive control method the individual
inverter currents are compared with the one that should be
supplied - the load current divided by the number of
inverters. The differences between the active and reactive
power in the inverters control the phase and the amplitude
voltage of the respective inverters [lo], [ 1 I], [ 121.
In the voltage and frequency droop method the system
control is achieved by slightly reducing the output voltage

and frequency according to the active and reactive power of
each inverter [131.
When the control system is based on instantaneous
modulation techniques each switching pulse has the
necessary information for the parallel operation [2], [131.
However, part of this information is the result of measuring
the active and the reactive power of the inverters. Thus, the

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0-7803-3026-9195 $4.00 0 1995 IEEE

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Fig.1 . Output current control system.

system Jynamic response can be similar to the one that is
obtained with a less complex control system.
In some circumstances it is possible and advantageous to
simplify the control system. The controller only implements
reactive power control, [9].
This paper presents a current control system which is
simple but effective. The proposed block diagram for the
paralleled inverters is represented in Fig. 1.
Being the inverters from the same manufacturer they have
the same characteristics: equal nominal power; similar
internal impedance; very close dynamic response. With these
conditions the parallel operation with good characteristics is
possible with only the voltage control loop and using a
common phase reference for all the inverters. In this control

system, the current supplied by each inverter is compared
with the reference current - the load current divided by the
number of operating inverters - being the error signal the
input of a proportional plus integral controller which actuates
in the reference voltage of the respective inverter.

Fig.3. IollI02 in open loop operation in functionof filter inductances and
the inverter reference voltages.

+20%, and of the reference voltage for the two inverters,

from -2% to +2%. The load is the parallel nominal load
without redundancy and the power factor is 0.8 ind. For this
control system, the common bus AC voltage is a non
controlled variable, being a function of the system operating
point.
The output voltage variation is less than 2% which means
that only a small compensation is needed. The two other
variables to be controlled, the output currents, have been also
simulated. Fig.3 shows Iol/I02 in function of the inverter

output voltages, V1 and V2, and the filter inductances, L1
and L2. Iolll02 in function of V I and V2 and of the load
power factor is shown in Fig.4 for L1=0.8*L2.
There is a significant variation in 1011102 in function of
L1/L2 but these parameters are constant for a particular set of
inverters, having little variation with the operating
conditions. So, they demand for a preliminary adjust of the
voltage reference in order to obtain a greater equilibrium.
The load power factor has less influence in the current

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B. Open Loop Static Characteristics

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The validity of the above assumptions has been simulated.
Fig.2 shows the open loop normalized output voltage VoIV 1
in function of the filter inductances, L1 and L2, from -20% to


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Fig.4. IOllIo2 in mnction of the filter inductances and the load power
factor.


Fig.2. Open loop normalized output voltage.

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Fig.6. UPS synchronization circuit.

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FigS. Experimental open loop output currents: 101; 102. 10 Mdiv.

phase reference. In the two modes the phase reference signal
unbalance. In both cases the phase deviation is very small is transmitted to all the inverters through an optical fiber link.

making the active and reactive power differences very small This has the advantage of a high noise immunity since the
too.
various UPSs are separated from each other significant
The parallel operation has been verified in open loop. An distances and the noise level due to commutation circuits and
oscilogram of this situation is presented in Fig.5. The load is cells is high.
the parallel nominal load without redundancy and the power
factor is 0.8 inductive. The relevant characteristics of the
m. PARALLEL OPERATION CONTROLLER
tested UPSs are: S=12 kVA; Vo=220/380 V; 50 Hz;
Vdc=384 V; Fc=1500 Hz. The output filter parameters are:
The design of the parallel operation digital controller is an
Lf=2.2 mH, in the output transformer primary winding;
Cf=25 pF, delta connected in the secondary. These values are evolution from the analogue one. The characteristics of the
the nominal ones. The actual values of the filter parameters inverter voltage controller in stand alone operation allows the
are somewhat different in the leakage inductance as in the design of the continuous controller for the parallel operation.
magnetizing currents. These differences, associated with This controller has been also simulated. The transfer function
small deviations in the amplitude voltage reference, cause of the inverter controller is:
high unbalance in the open loop parallel operation.
1+ sT1
Fig.5 shows that the parallel operation has a high sensivity
to the differences in the internal references and to variations (')'
= s( 1+ sT2)
in the filter parameters. The inverter one output current is
40% higher than that of inverter two and also the harmonic
The controller of the parallel operation for the referred
currents in the first inverter are bigger.
conditions is of the proportional plus integral type and is
described by:
C. UPS Synchronization
1+ sT3
=The power supply synchronization mode is defined by the
parallel control system. There are two different operating
The output of a continuous PI controller can be described
modes as is shown in Fig.6. In mode 1 the synchronizing
signal is defined by the mains presence. Switch 1 is on and by:
switch 2 is off The load voltage is synchronized with the
mains through a Phase Locked Loop (PLL). All the inverters
receive a common reference signal making the output
voltages to be in phase. If the mains voltage fails the UPS
synchronization operates in mode 2. In this mode a crystal
reference is selected for the phase synchronization. As in where e(t) is the error signal, kp is the controller gain and Ti
mode 1 all operating inverters synchronize from the same is the integral constant.

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Various discretization methods have been used to simulate
and implement the digital controller. The best results were
obtained with the mapping of differentials method. A simple
and low cost 8-bit microcontroller based system was chosen
to implement the parallel operation controller. The error
signal in the instant nT is calculated from its value in the (nI)T and (n-2)T instants. T is the sampling period. The
simulated digital controller is expressed in the Z domain by:
pi(z) = Kp

b2*z2+bi*z+bo

4
0

(4)

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0.18

with

bz = 2 + 3T I Ti
bi=-3-3T/Ti
bo = 1+ T I Ti

0.185

0.19
Time, s

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Fig.8. Steady state operation. Load voltage (upper trace - 100 V/div) and
inverters output currents (10 Ndiv).

circulating current, showed in Fig.9. The circulating current
is in quadrature with the load voltage which means that there
is no active power unbalance. Fig.8 also shows the different
harmonic content of the two output currents.

A. Simulation Results
The parallel operation of two inverters was simulated
using this controller. The transient response is presented in
Fig.7 for a 100% load step. For the inverter voltage
controller: TI=l ms; T2=0.5 ms. The parallel operation
controller parameters are Kp=l.O; Ti=50 ms; T=IO ms and
the load power is 14 kVA with a unity power factor.
The correction generated by this controller causes a
variation of 2% in the inverter internal voltage reference. The
simulated steady state operation of two UPSs in parallel are
presented in Fig.8 and Fig.9. The filter parameters considered
for the simulation were: L1=2.2 mH; L2=2.0 mH; C1=23 pF;
C2=27 pF. Fig.8 shows that the output currents have the
same amplitude but, due to the one degree of freedom
allowed by the controller, there is a phase difference between
the currents. This phase difference causes the existence of a

B. Experimental Results

The digital controller experimental response in the parallel
operation of two 12 kVA three phase UPSs is presented in
Fig.10. The load is a 100% load step.
The steady state operation is shown in Fig.11 and Fig.12
for a 14 kVA load. Fig.11 shows the load voltage and the two
output currents. As can be seen the output currents have the
same amplitude and a very small phase difference. Io1 leads
the output voltage and I02 has a phase lag. In this situation,
the active power supplied by each inverter is the same and
the reactive power unbalance is kept at a minimum level.
The circulating current, the load voltage and the inverter 1

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Time, s

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Fig.9. Steady state operation. Load voltage (upper trace); inverter 1 output
current (10 Ndiv) and circulating current (5 Mdiv).

Fig.7. Discrete controller simulation.

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Fig. IO. Experimental discrete controller operation.

Fig.12. Load voltage (upper trace - 100 V/div); inverter 1 output current
(IO Ndiv) and circulating current (5 Ndiv).

output current are shown in Fig.12. As referred in the
preceeding section this current is in quadrature with the
output currents and with the load voltage. With inductive
loads the operation is similar. There are small differences in
the active and reactive powers supplied by the inverters but
they have no significance.

IV. CONCLUSION

The parallel operation of UPSs can be based on different
control methods: active and reactive power control; voltage
and frequency droop; instantaneous modulation techniques.
This paper presents a simple and low cost current
controller for the parallel operation of voltage source
inverters within standard UPS systems. The parallel
operation with good characteristics is possible with only the

voltage control loop and using a common phase reference for
all the inverters.
The simulation and experimental results show that it is
possible to keep constant the relative phase of the paralleled
inverters. The active power unbalance is very small since
there is a perfect synchronization of the inverter output
voltages and the U P S characteristics are very similar in the
dynamic response and in the power rating. The inverter
output voltage controls the output current imposing a very
small circulating current for all power factors.

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V. REFERENCES

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Fig. 11. Load voltage (upper trace-I 00 V/div) and inverters output currents
(10 Ndiv).

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[8]

[9]

[IO]

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[ll]