Lampiran A Rangkaian Modem PSK 1200 Bps

CA124, CA224, CA324,

  S E M I C O N D U C T O R LM324, LM2902 Quad, 1MHz, Operational Amplifiers for November 1996

  Commercial, Industrial, and Military Applications Features Description The CA124, CA224, CA324, LM324, and LM2902 consist of

• • Operation from Single or Dual Supplies

  four independent, high-gain operational amplifiers on a

• • Unity-Gain Bandwidth . . . . . . . . . . . . . . . . . 1MHz (Typ)

  single monolithic substrate. An on-chip capacitor in each of the amplifiers provides frequency compensation for unity

• • DC Voltage Gain . . . . . . . . . . . . . . . . . . . . . 100dB (Typ)

  gain. These devices are designed specially to operate from

• • Input Bias Current . . . . . . . . . . . . . . . . . . . . 45nA (Typ)

  either single or dual supplies, and the differential voltage range is equal to the power-supply voltage. Low power drain

• • Input Offset Voltage . . . . . . . . . . . . . . . . . . . . 2mV (Typ)

  and an input common-mode voltage range from 0V to V+

• • Input Offset Current
• 1.5V (single-supply operation) make these devices suitable for battery operation.
• - CA224, CA324, LM324, LM2902 . . . . . . . . . . . . 5nA (Typ) - CA124 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3nA (Typ) Ordering Information • Replacement for Industry Types 124, 224, 324 PART NUMBER TEMP. PKG. o (BRAND) RANGE ( C) PACKAGE NO. Applications

  CA0124E -55 to 125

  14 Ld PDIP E14.3

• • Summing Amplifiers

  CA0124M -55 to 125

  14 Ld SOIC M14.15

• • Multivibrators

  (124)

• • Oscillators

  CA0124M96 -55 to 125

  14 Ld SOIC Tape and Reel M14.15 (124)

• • Transducer Amplifiers

  CA0224E -40 to 85

  14 Ld PDIP E14.3

• • DC Gain Blocks

  CA0224M -40 to 85

  14 Ld SOIC M14.15 (224) CA0224M96 -40 to 85

  14 Ld SOIC Tape and Reel M14.15 Pinout

  (224)

CA124, CA224, CA324, LM2902 (PDIP, SOIC)

  CA0324E 0 to 70

  14 Ld PDIP E14.3

LM324 (PDIP)

  TOP VIEW CA0324M 0 to 70

  14 Ld SOIC M14.15 (324) OUTPUT 1

  1

  14 CA0324M96 0 to 70

  14 Ld SOIC Tape and Reel M14.15 OUTPUT 4

  (324) NEG. NEG.

  1

  4

  2

  13 + +

  INPUT 1

  INPUT 4 LM324N 0 to 70

  14 Ld PDIP E14.3 POS. POS. LM2902N -40 to 85

  14 Ld PDIP E14.3

  3

  12 INPUT 1

  INPUT 4 LM2902M -40 to 85

  14 Ld SOIC M14.15 V+

  4

  11 V- (2902) POS. POS.

  LM2902M96 -40 to 85

  14 Ld SOIC Tape and Reel M14.15

  5

  10 INPUT 2

  INPUT 3 (2902)

• + NEG. NEG. +

  6

  9

  2

  3 INPUT 2

  INPUT 3

  7

  8 OUTPUT 3 OUTPUT 2

CA124, CA224, CA324, LM324, LM2902 CA124, CA224, CA324, LM324, LM2902

  Absolute Maximum Ratings Thermal Information

  o

  Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32V or ±

  16V Thermal Resistance (Typical, Note 3) θ ( C/W)

  JA

  Differential Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32V PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 32V SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175

  o

  Input Current (V < -0.3V, Note 1) . . . . . . . . . . . . . . . . . . . . . . . 50mA

  I Maximum Junction Temperature (Die) . . . . . . . . . . . . . . . . . . 175 C o

  Output Short Circuit Duration (V+ ≤

  15V, Note 2). . . . . . Continuous Maximum Junction Temperature (Plastic Package) . . . . . . . . 150 C

  o o

  Maximum Storage Temperature Range . . . . . . . . . -65 C to 150 C

  o

  Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300 C Operating Conditions

  (SOIC - Lead Tips Only) Temperature Range

  o o

  CA124 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55 C to 125 C

  o o

  CA224, LM2902 . . . . . . . . . . . . . . . . . . . . . . . . . . . -40 C to 85 C

  o o

  CA324, LM324 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 C to 70 C

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation

of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied NOTES:

  

1. This input current will only exist when the voltage at any of the input leads is driven negative. This current is due to the collector base junction of

the input p-n-p transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is also lateral n-p-n parasitic transistor action on the IC chip. This transistor action can cause the output voltages of the amplifiers to go to the V+ voltage level (or to ground for a large overdrive) for the time duration that an input is driven negative. This transistor action is not destructive and normal output states will re-establish when the input voltage, which was negative, again returns to a value greater than -0.3V.

  

2. The maximum output current is approximately 40mA independent of the magnitude of V+. Continuous short circuits at V+ > 15V can cause

excessive power dissipation and eventual destruction. Short circuits from the output to V+ can cause overheating and eventual destruc- tion of the device. 3. θ is measured with the component mounted on an evaluation PC board in free air.

  JA

  Electrical Specifications Values Apply for Each Operational Amplifier. Supply Voltage V+ = 5V, V- = 0V, Unless Otherwise Specified

CA124 CA224, CA324, LM324 LM2902 TEST TEMP.

  o

  PARAMETER CONDITIONS (

C) MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS

  25

  2

  5

  2 7 mV

- - - - - Input Offset

Voltage (Note 6)

  7

  9 - - - - - Full

• 10 mV

  o

  Full 7 - - Average Input R = 0 Ω -

  7 - 7 µ V/ C - -

  S

  Offset Voltage Drift

• Full V+ V+ - V+ - Differential Input

  V Voltage (Note 5)

  25 V+ -1.5 V+ -1.5 - - - - - Input Common V+ = 30V

  V Mode Voltage V+ = 30V Full -

• V+ -2 V+ -2

  V Range (Note 5)

• Full - - V+ = 26V

V+ -2

  V

  25

  70

  85

  65 70 dB - - - - - Common Mode DC Rejection Ratio Power Supply DC

  25 65 100 65 100 dB - - - - - Rejection Ratio I + or I - Input Bias

  25 - 45 150 - - - - 45 250 nA

  I I

  Current (Note 4) I + or I - - -

• Full 300 500 40 500 nA

  I I

  I + - I

  25 - - Input Offset

  3

  30 5 - - - - 50 nA

  I I

  Current I + - I

• Full 100 150

  - 45 200 nA

  I I o

  10

  10 10 pA/ C - - - - - - Average Input Full

CA124, CA224, CA324, LM324, LM2902

  Electrical Specifications Values Apply for Each Operational Amplifier. Supply Voltage V+ = 5V, V- = 0V, Unless Otherwise Specified (Continued)

CA124 CA224, CA324, LM324 LM2902 TEST TEMP.

  o

  PARAMETER CONDITIONS (

C) MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS

  Large Signal R ≥ 2k Ω , V+ = 15V

  25 94 100 - 88 100 - dB - - -

  L

  Voltage Gain (For Large V Swing)

  O

  88 - - - - R ≥ 2k Ω , V+ = 15V Full

  83 83 -

• dB

  L

  (For Large V Swing)

  O

  Ω 25 - V+ -1.5 V+ -1.5 - - - - Output R = 2k

  V L Voltage High R = 2k Ω - - - - - , V+ = 30V Full -

  26 26 -

  V Swing L Level R = 2k Ω

  22 - - - - - - - , V+ = 26V Full V -

  L

  R = 10k Ω - , V+ = 30V

  27

  28

  27

  28 - - Full

  23

  28 V

  L

  Low R = 10k Ω

  5

  20

  5

  20 - - Full - 5 100 mV

  L

  Level Output + = +1V, V - Source V

  20 - = 0V, 40 -

  20 40 - - mA

• 25

  I I

  Current V+ = 15V V + = 1V, V - - - - = 0, Full

  10

  20

  10

  20

  10 20 mA

  I I

  V+ = 15V V + = 0V, V - = 1V,

  25

  10

  20

  10 - 20 mA

- - - - Sink

  I I

  V+ = 15V V + = 0V, V - = 1V,

  25

  12

  50

  12 50 - µ A - - - -

  I I

  V = 200mV

  O

  V - = 1V, V + = 0, Full

  5

8 -

  5 8 -

  5 8 mA -

  I I

  V+ = 15V 25 -120 -120 dB

• Crosstalk
• f = 1 to 20kHz (Input Referred) Total Supply R = Full

  0.8

  2

- - -

  0.8

  2

  0.7 1.2 mA ∞

  L

  Current R =

• , V+ = 26V - - - Full

  1.5 3 mA ∞

  L

  NOTES:

  

4. Due to the PNP input stage the direction of the input current is out of the IC. No loading change exists on the input lines because the

current is essentially constant, independent of the state of the output.

  

5. The input signal voltage and the input common mode voltage should not be allowed to go negative by more than 0.3V. The positive limit

of the common mode voltage range is V+ - 1.5V, but either or both inputs can go to +32V without damage.

  6. V = 1.4V, R = 0 Ω with V+ from 5V to 30V, and over the full input common mode voltage range (0V to V+ - 1.5V).

  O S

CA124, CA224, CA324, LM324, LM2902

CA124, CA224, CA324, LM324, LM2902

  3

  4

  3

  2

  1

  INPUT T A = 25 o C V+ = 30V 500 450 400 350 300 250

  2

  4 + -

  6

  11

  V I 0.1 µ F

  V O V+/2

  V + = 10 TO 15V V+ = 26V V+

   85 o C

  10M FREQUENCY (Hz) OPEN-LOOP V OL T A GE GAIN (dB) T A = -40 ≤ T A ≤

  5

  8

  7

  2

  INPUT V OL T A GE (V)

  1 OUTPUT V OL T A GE (V)

  2

  3

  4

  1

  3

  11

  4

  3 - + T A = 25 o C V+ = 15V R L = 2k Ω

  2

  1

  V I 50pF

  V O

  9 TIME ( µ s) OUTPUT V OL T A GE (mV)

  1M

  Schematic Diagram (One of Four Operational Amplifiers)

  1K

  9 10 + -

  4 TO 2, 3, 4 TO 2, 3, 4

  4

  12 + -

  13

  8

  3

  7

  1 10 100

  2

  5 + -

  6

  1

  4

  2

  3

  V O R SC Q

  6 Q

  5 Q

  8 Q

  20

  40

  60

  80

  13 V- Typical Performance Curves FIGURE 1. OPEN LOOP FREQUENCY RESPONSE FIGURE 2. VOLTAGE FOLLOWER PULSE RESPONSE (SMALL SIGNAL) 140 120 100

  1 INPUTS - + Q

  2 V+ Q

  7 Q

  3 Q

  4 Q

  9 Q

  10 C COMP 4 µ A 6 µ A Q

  

11

Q

  Q

  12 50 µ A 100 µ A

1 OUTPUT

  10K 100K

CA124, CA224, CA324, LM324, LM2902

   (Continued) Typical Performance Curves V = 0V V+

  ICR

  60 mA

  I D V+ = 30V

  50

  4

  4

  2 -

  15V

  1

  40

• + 3

  11

  3

  30

  5V Y CURRENT (mA)

  2

20 SUPPL o o T = 0 C TO 125 C A

  INPUT CURRENT (nA)

  1

  10 o -55 C -75 -50 -25

  25

  50 75 100 125

  5

  10

  15

  20

  25

  30 o TEMPERATURE (

C) POSITIVE SUPPLY VOLTAGE (V)

  

FIGURE 4. INPUT CURRENT vs AMBIENT TEMPERATURE FIGURE 5. SUPPLY CURRENT vs SUPPLY VOLTAGE

  20

  70 o 100k Ω

  T A = 25 C V+ = 15V

  60 4 +15V 1k Ω

  15

2 V O -

  50

  1 +

  3 +7V

  V I 2k Ω

  40

  11 GE SWING (V)

  10 A T

  30 OL

  20

5 OUTPUT V

  10 OUTPUT SOURCE CURRENT (mA) -75 -50 -25

  25

  50 75 100 125

  1K

  10K 100K

  1M o TEMPERATURE (

  C) FREQUENCY (Hz) FIGURE 6. LARGE SIGNAL FREQUENCY RESPONSE FIGURE 7. OUTPUT CURRENT vs AMBIENT TEMPERATURE o o T = 25 C

  T = 25 C A A

  75 150 125

  R L = 20k Ω GE GAIN (dB)

  100 R = 2k Ω

  50 L A T OL

  75

  50

  25 INPUT CURRENT (nA)

  25 OPEN LOOP V

  10

  20

  30

  40

  10

  20

  30

  40

CD4050BM/CD4050BC CD4049UBM/CD4049UBC

  March 1988

  CD4049UBM/CD4049UBC Hex Inverting Buffer CD4050BM/CD4050BC Hex Non-Inverting Buffer General Description Features

_Y

  Wide supply voltage range

  3.0V to 15V These hex buffers are monolithic complementary MOS _Y (CMOS) integrated circuits constructed with N- and P-chan- Direct drive to 2 TTL loads at 5.0V over full tempera- nel enhancement mode transistors. These devices feature ture range _Y logic level conversion using only one supply voltage (V ).

  DD High source and sink current capability Hex

  The input signal high level (V ) can exceed the V supply Y

IH DD

  Special input protection permits input voltages greater voltage when these devices are used for logic level conver- than V

  DD Hex

  sions. These devices are intended for use as hex buffers,

  Non-Inverting

  CMOS to DTL/TTL converters, or as CMOS current drivers,

  Applications

  e and at V

  5.0V, they can drive directly two DTL/TTL

  DD

_Y

  CMOS hex inverter/buffer loads over the full operating temperature range.

_Y

  Inverting _Y CMOS to DTL/TTL hex converter _Y CMOS current ‘‘sink’’ or ‘‘source’’ driver

  CMOS high-to-low logic level converter

  Connection Diagrams Buffer Buffer

  CD4049UBM/CD4049UBC CD4050BM/CD4050BC Dual-In-Line Package Dual-In-Line Package

  TL/F/5971 – 1 TL/F/5971 – 2

  Top View Top View

  Order Number CD4049UB or CD4049B Order Number CD4050UB or CD4050B

  C1995 National Semiconductor Corporation TL/F/5971 ^{RRD-B30M105/Printed in U. S. A.} Absolute Maximum Ratings (Notes 1 & 2)

  If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage (V

  3.5 V

  3.0 V

  V IH High Level Input Voltage l

  I O

  l ^k

  1 mA (CD4050BM Only)

  V DD e

  5V, V

  O

  e

  4.5V

  3.5

  3.5

  2.75

  V DD e

  3.5

  10V, V

  O

  e

  9V

  7.0

  7.0

  5.5

  7.0 V

  V DD e

  15V, V

  O

  e

  13.5V

  11.0

  3.0

  3.0

  8.25

  1.5

  6.75

  4.0

  4.0 V

  V IL Low Level Input Voltage

  l

  I O

  l ^k

  1 mA (CD4049UBM Only)

  V DD e

  5V, V

  O

  e

  4.5V

  1.0

  1.0

  13.5V

  1.0 V

  V DD e

  10V, V

  O

  e

  9V

  2.0

  2.5

  2.0

  2.0 V

  V DD e

  15V, V

  O

  e

  11.0

  11.0 V

  1.5V

  0.5V

  e

  0V (Note 3)

  V DD e

  5V, V

  O

  e

  0.4V

  5.6

  4.6

  5 3.2 mA

  V DD e

  10V, V

  O

  e

  12

  V DD , V

  9.8

  12 6.8 mA

  V DD e

  15V, V

  O

  e

  1.5V

  35

  29

  40 20 mA

  

Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed; they are not meant to imply that the devices

should be operated at these limits. The table of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provides conditions for actual device

operation. Note 2:

  V SS ^e 0V unless otherwise specified. Note 3: These are peak output current capabilities. Continuous output current is rated at 12 mA maximum. The output current should not be allowed to exceed this value for extended periods of time. I

  OL and I

  OH are tested one output at a time.

  IL

  V IH e

  V IH High Level Input Voltage l

  O

  I O

  l ^k

  1 mA (CD4049UBM Only)

  V DD e

  5V, V

  O

  e

  0.5V

  4.0

  4.0

  3.5

  4.0 V

  V DD e

  10V, V

  e

  I OL Low Level Output Current

  1V

  8.0

  8.0

  7.5

  8.0 V

  V DD e

  15V, V

  O

  e

  1.5V

  12.0

  12.0

  11.5

  12.0 V

  4.0

  e

  DD

  2.0

  40 § C to a85 § C

  DC Electrical Characteristics CD4049M/CD4050BM (Note 2)

  Symbol Parameter Conditions b 55 § C a

  25 § C a 125 § C

  Units Min Max Min Typ Max Min Max

  I DD Quiescent Device Current

  V DD e

  5V

  1.0

  0.01

  1.0 30 mA

  V DD e

  10V

  0.01

  ) CD4049UBM, CD4050BM b

  2.0 60 mA

  V DD e

  15V

  4.0

  0.03 4.0 120 mA

  V OL Low Level Output Voltage

  V IH e

  V DD , V

  IL

  e

  0V,

  l

  I O

  l ^k

  55 § C to a125 § C CD4049UBC, CD4050BC b

  A

  V DD e

  D

  ) b

  0.5V to a18V Input Voltage (V

  IN

  ) b

  0.5V to a18V Voltage at Any Output Pin (V

  OUT

  ) b

  0.5V to V

  DD

  a

  0.5V Storage Temperature Range (T

  S

  ) b 65 § C to a150 § C

  Power Dissipation (P

  ) Dual-In-Line 700 mW Small Outline 500 mW

  Operating Temperature Range (T

  Lead Temperature (T

  L

  ) (Soldering, 10 seconds) 260 § C

  Recommended Operating Conditions

  (Note 2) Supply Voltage (V

  DD

  )

  3V to 15V Input Voltage (V

  IN

  )

  0V to 15V Voltage at Any Output Pin (V

  OUT

  ) 0 to V

  DD

  1 mA

  5V

  O

  0.5V

  V DD e

  15V

  14.95

  14.95

  15

  14.95 V

  V IL Low Level Input Voltage l

  I O

  l ^k

  1 mA (CD4050BM Only)

  V DD e

  5V, V

  O

  e

  1.5

  10

  2.25

  1.5

  1.5 V

  V DD e

  10V, V

  O

  e

  1V

  3.0

  4.5

  3.0

  3.0 V

  V DD e

  15V, V

  9.95 V

  9.95

  0.05

  V DD , V

  0.05

  0.05 V

  V DD e

  10V

  0.05

  0.05

  0.05 V

  V DD e

  15V

  0.05

  0.05

  0.05 V

  V OH High Level Output Voltage

  V IH e

  IL

  9.95

  e

  0V,

  l

  I O

  l ^k

  1 mA

  V DD e

  5V

  4.95

  4.95

  5

  4.95 V

  V DD e

  10V

  2 DC Electrical Characteristics CD4049M/CD4050BM (Note 2) (Continued)

  Symbol Parameter Conditions b 55 § C a

  2.5

  O

  e

  4.5V

  1.0

  1.5

  1.0

  1.0 V

  V DD e

  10V, V

  O

  e

  9V

  2.0

  2.0

  V DD e

  2.0 V

  V DD e

  15V, V

  O

  e

  13.5V

  3.0

  3.5

  3.0

  3.0 V

  V IH High Level Input Voltage l

  I O

  l ^k

  5V, V

  1 mA (CD4049UBC Only)

  V DD e

  3.0

  5V, V

  O

  e

  0.5V

  1.5

  2.25

  1.5

  1.5 V

  V DD e

  10V, V

  O

  e

  1V

  4.5

  l ^k

  3.0

  3.0 V

  V DD e

  15V, V

  O

  e

  1.5V

  4.0

  6.75

  4.0

  4.0 V

  V IL Low Level Input Voltage l

  I O

  1 mA (CD4050BC Only)

  5V, V

  1 mA (CD4050BC Only)

  7.5

  e

  0.5V

  4.0

  4.0

  3.5

  4.0 V

  V DD e

  10V, V

  O

  e

  1V

  8.0

  8.0

  8.0 V

  5V, V

  V DD e

  15V, V

  O

  e

  1.5V

  12.0

  12.0

  11.5

  12.0 V

  Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed; they are not meant to imply that the devices

should be operated at these limits. The table of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provides conditions for actual device

operation. Note 2:

  V SS ^e 0V unless otherwise specified. Note 3: These are peak output current capabilities. Continuous output current is rated at 12 mA maximum. The output current should not be allowed to exceed this value for extended periods of time. I

  OL and I

  OH are tested one output at a time.

  O

  V DD e

  O

  5.5

  e

  4.5V

  3.5

  3.5

  2.75

  3.5 V

  V DD e

  10V, V

  O

  e

  9V

  7.0

  7.0

  7.0 V

  1 mA (CD4049UBC Only)

  V DD e

  15V, V

  O

  e

  13.5V

  11.0

  11.0

  8.25

  11.0 V

  V IH High Level Input Voltage

  l

  I O

  l ^k

  V DD e

  l ^k

  25 § C a 125 § C

  5

  e

  0V b 0.1 b

  10 ^b

  5

  b

  0.1 b 1.0 mA

  V DD e

  15V, V

  IN

  e

  15V

  0.1

  10 ^b

  0.1 1.0 mA

  15V, V

  

Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed; they are not meant to imply that the devices

should be operated at these limits. The table of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provides conditions for actual device

operation. Note 2:

  V SS ^e 0V unless otherwise specified. Note 3: These are peak output current capabilities. Continuous output current is rated at 12 mA maximum. The output current should not be allowed to exceed this value for extended periods of time. I

  OL and I

  OH are tested one output at a time.

  DC Electrical Characteristics CD4049UBC/CD4050BC (Note 2)

  Symbol Parameter Conditions b 40 § C a

  25 § C a 85 § C

  Units Min Max Min Typ Max Min Max

  I DD Quiescent Device Current

  V DD e

  5V

  4

  0.03

  IN

  V DD e

  V DD e

  0.72 mA

  Units Min Max Min Typ Max Min Max

  I OH High Level Output Current

  V IH e

  V DD , V

  IL

  e

  0V (Note 3)

  V DD e

  5V, V

  O

  e

  4.6V b 1.3 b

  1.1 b 1.6 b

  V DD e

  I IN Input Current

  10V, V

  O

  e

  9.5V b 2.6 b

  2.2 b 3.6 b

  1.5 mA

  V DD e

  15V, V

  O

  e

  13.5V b 8.0 b

  7.2 b 12 b

  5.0 mA

  4.0 30 mA

  10V

  I O

  5

  V IH e

  V DD , V

  IL

  e

  0V,

  l

  I O

  l ^k

  1 mA

  V DD e

  5V

  4.95

  4.95

  4.95 V

  0.05 V

  V DD e

  10V

  9.95

  9.95

  10

  9.95 V

  V DD e

  15V

  14.95

  14.95

  15

  14.95 V

  V IL Low Level Input Voltage l

  V OH High Level Output Voltage

  0.05

  8

  l

  0.05

  8.0

  60 mA

  V DD e

  15V

  16

  0.07 16.0 120 mA

  V OL Low Level Output Voltage

  V IH e

  V DD , V

  IL

  e

  0V,

  I O

  0.05

  l ^k

  1 mA

  V DD e

  5V

  0.05

  0.05

  0.05 V

  V DD e

  10V

  0.05

  0.05

  0.05 V

  V DD e

  15V

  3 DC Electrical Characteristics CD4049UBC/CD4050BC (Note 2) (Continued)

  Symbol Parameter Conditions b 40 § C a

  25 45 ns C

  TLH

  Transition Time

  V DD e

  5V 60 120 ns Low-to-High Level

  V DD e

  10V

  30 55 ns

  V DD e

  15V

  IN

  15V

  Input Capacitance Any Input

  15 22.5 pF * AC Parameters are guaranteed by DC correlated testing.

  AC Electrical Characteristics* CD4050BM/CD4050BC

  T

  A

  e 25 § C, C

  L

  e 50 pF, R

  L

  15 30 ns t

  V DD e

  r

  25 45 ns

  15V

  15 30 ns t

  PLH

  Propagation Delay Time

  V DD e

  5V

  45 85 ns Low-to-High Level

  V DD e

  10V

  V DD e

  20 40 ns

  15V

  20 35 ns t

  THL

  Transition Time

  V DD e

  5V

  30 60 ns High-to-Low Level

  V DD e

  10V

  e 200k, t

  e t

  20 40 ns

  V DD e

  30 60 ns High-to-Low Level

  V DD e

  10V

  20 40 ns

  V DD e

  15V

  15 30 ns t

  TLH

  Transition Time

  5V 60 120 ns Low-to-High Level

  V DD e

  V DD e

  10V

  30 55 ns

  V DD e

  15V

  25 45 ns C

  IN

  Input Capacitance Any Input

  5 7.5 pF * AC Parameters are guaranteed by DC correlated testing.

  5V

  Transition Time

  f

  15V

  e 20 ns, unless otherwise specified Symbol Parameter Conditions Min Typ Max Units t

  PHL

  Propagation Delay Time

  V DD e

  5V 60 110 ns High-to-Low Level

  V DD e

  10V

  25 55 ns

  V DD e

  20 30 ns t

  THL

  PLH

  Propagation Delay Time

  V DD e

  5V 60 120 ns Low-to-High Level

  V DD e

  10V

  30 55 ns

  V DD e

  15V

  25 45 ns t

  V DD e

  10V

  25 § C a 85 § C

  V DD , V

  O

  e

  1.5V

  29

  25

  40 20 mA

  I OH High Level Output Current V

  IH

  e

  IL

  V DD e

  e

  0V (Note 3)

  V DD e

  5V, V

  O

  e

  4.6V b 1.0 b

  0.9 b 1.6 b

  0.72 mA

  15V, V

  12 6.8 mA

  10V, V

  O

  Units Min Max Min Typ Max Min Max

  I OL Low Level Output Current

  V IH e

  V DD , V

  IL

  e

  0V (Note 3)

  V DD e

  5V, V

  e

  8.5

  0.4V

  4.6

  4.0

  5 3.2 mA

  V DD e

  10V, V

  O

  e

  0.5V

  9.8

  V DD e

  O

  V DD e

  L

  10 ^b

  5

  1.0 mA

  AC Electrical Characteristics* CD4049UBM/CD4049UBC

  T

  A

  e 25 § C, C

  L

  e 50 pF, R

  e 200k, t

  0.3

  r

  e t

  f

  e 20 ns, unless otherwise specified Symbol Parameter Conditions Min Typ Max Units t

  PHL

  Propagation Delay Time

  V DD e

  5V

  30 65 ns High-to-Low Level

  0.3

  15V

  e

  I IN Input Current

  9.5V b 2.1 b

  1.9 b 3.6 b

  1.5 mA

  V DD e

  15V, V

  O

  e

  13.5V b7.1 b 6.2 b

  12 b 5 mA

  V DD e

  e

  15V, V

  IN

  e

  0V b 0.3 b

  0.3 b10 ^b

  5 b

  1.0 mA

  V DD e

  15V, V

  IN

  4 Schematic Diagrams

  CD4049UBM/CD4049UBC CD4050BM/CD4050BC 1 of 6 Identical Units 1 of 6 Identical Units

  TL/F/5971 – 4 TL/F/5971 – 3 Switching Time Waveforms

  TL/F/5971 – 5 Typical Applications

  CMOS to TTL or CMOS at a Lower V

  DD t

  TL/F/5971 – 6 Note:

  V V DD1 DD2 Note: In the case of the CD4049UBM/CD4049UBC the output drive capability increases with increasing _e input voltage. E.g., If V

  10V the CD4049UBM/ DD1 CD4049UBC could drive 4 TTL loads.

  5 Physical Dimensions inches (millimeters) Buffer Buffer Inverting Hex Non-Inverting

  Hex

  Ceramic Dual-In-Line Package (J) Order Number CD4049UBMJ, CD4049UBCJ, CD4049BMJ or CD4049BCJ

  NS Package Number J16A

  CD4049UBM/CD4049UBC CD4050BM/CD4050BC

  Molded Dual-In-Line Package (N) Order Number CD4050BMN, CD4050BCN, CD4050BMN or CD4050BCN

  NS Package Number N16E LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:

  1. Life support devices or systems are devices or

  2. A critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness. be reasonably expected to result in a significant injury to the user.

  National Semiconductor National Semiconductor National Semiconductor National Semiconductor Corporation Europe Hong Kong Ltd. Japan Ltd. _a 1111 West Bardin Road Fax: ( 49) 0-180-530 85 86 13th Floor, Straight Block, Tel: 81-043-299-2309 _@ Arlington, TX 76017 Email: cnjwge tevm2.nsc.com Ocean Centre, 5 Canton Rd. Fax: 81-043-299-2408 Tel: 1(800) 272-9959 Deutsch Tel: ( a 49) 0-180-530 85 85 Tsimshatsui, Kowloon Fax: 1(800) 737-7018 English Tel: ( a 49) 0-180-532 78 32 Hong Kong _a Fran3ais Tel: ( 49) 0-180-532 93 58 Tel: (852) 2737-1600 _{National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.} Italiano Tel: ( a 49) 0-180-534 16 80 Fax: (852) 2736-9960

  CD404

  October 1987 Revised January 1999

  6BC Micr CD4046BC opo Micropower Phase-Locked Loop

  The INHIBIT input, when high, disables the VCO and

  wer Phase- General Description source follower to minimize standby power consumption.

  The CD4046BC micropower phase-locked loop (PLL) con- The zener diode is provided for power supply regulation, if sists of a low power, linear, voltage-controlled oscillator necessary.

  (VCO), a source follower, a zener diode, and two phase comparators. The two phase comparators have a common

  Features

  signal input and a common comparator input. The signal ■ Wide supply voltage range: 3.0V to 18V input can be directly coupled for a large voltage signal, or

  Loc

  capacitively coupled to the self-biasing amplifier at the sig- ■ Low dynamic power consumption: 70

  µ W (typ.) at f o = nal input for a small voltage signal.

  10 kHz, V =

  5V DD

  ked Loop

  Phase comparator I, an exclusive OR gate, provides a digi- ■ VCO frequency: 1.3 MHz (typ.) at V =

  10V

  DD

  tal error signal (phase comp. I Out) and maintains 90 ° ■ Low frequency drift: 0.06%/

  ° C at V =

  10V with tem- phase shifts at the VCO center frequency. Between signal DD input and comparator input (both at 50% duty cycle), it may perature lock onto the signal input frequencies that are close to har-

  ■ High VCO linearity: 1% (typ.) monics of the VCO center frequency. Phase comparator II is an edge-controlled digital memory

  Applications

  network. It provides a digital error signal (phase comp. II

• FM demodulator and modulator Out) and lock-in signal (phase pulses) to indicate a locked
• Frequency synthesis and multiplication condition and maintains a 0 ° phase shift between signal input and comparator input.
• Frequency discrimination The linear voltage-controlled oscillator (VCO) produces an
• Data synchronization and conditioning output signal (VCO Out) whose frequency is determined by
• Voltage-to-frequency conversion the voltage at the VCO

  IN input, and the capacitor and resis-

• Tone decoding tors connected to pin C1 , C1 , R1 and R2.

  A B

• FSK modulation The source follower output of the VCO (demodulator Out)

  IN

• Motor speed control is used with an external resistor of 10 k Ω or more.

  Ordering Code: Order Number Package Number Package Description

  CD4046BCM M16A 16-Lead Small Outline integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body CD4046BCN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

  Connection Diagram Pin Assignments for SOIC and DIP Top View

  Block Diagram

  46BC

  40 D C FIGURE 1.

• 25
• 85

  1.3

  O =

  15V, V

  =

  V DD

  2.25 0.9 mA

  1.1

  0.5V