Data transfer instructions University of Technology 8085 microproce

Department of Control and Systems Engineering Lecture 4 – Page 1 of 4 Third Year - Microprocessors By Mr.WaleedFawwaz Lecture 4- 8086 programming-Integer instructions and computations Objective: 1. Data transfer instructions 2. Arithmetic instructions 3. Logic instructions 4. Shift instructions 5. Rotate instructions --------------------------------------------------------------------

1. Data transfer instructions

a MOV instruction b XCHG Instruct Fig 1 a XCHG data transfer instruction b Allowed operands Example 1:For the figure below. What is the result of executing the following instruction? XCHG AX , [0002] Solution: 01007 01006 01005 01004 01003 01002 01001 01000 DS 0100 34 12 DF DD 30 00 A2 55 AX 9068 01007 01006 01005 01004 01003 01002 01001 01000 DS 0100 34 12 DF DD 90 68 A2 55 AX 3000 Before After Department of Control and Systems Engineering Lecture 4 – Page 2 of 4 Third Year - Microprocessors By Mr.WaleedFawwaz c XLAT Mnemonic Meaning Format Operation Flags affected XLAT Translate XLAT AL + BX + DS 10 AL none Fig 2 a XLAT data transfer instruction Example 2: For the figure below, what is the result of executing the following instruction? XLAT Solution: d LEA, LDS, and LES instructions Fig 3 a LEA, LDS and LES data transfer instruction Example 3: For the figure below, what is the result of executing the following instruction? LEA SI , [ DI + BX +2H] Solution: SI= DI + BX + 2H = 0062H DS 0100 SI F002 Before After DI 0020 AX 0003 BX 0040 DS 0100 SI 0062 DI 0020 AX 0003 BX 0040 01047 01046 01045 01044 01043 01042 01041 01040 DS 0100 34 12 DF DD 90 68 A2 55 AX xx90 01047 01046 01045 01044 01043 01042 01041 01040 DS 0100 34 12 DF DD 90 68 A2 55 AX xx03 Before After BX 0040 BX 0040 Department of Control and Systems Engineering Lecture 4 – Page 3 of 4 Third Year - Microprocessors By Mr.WaleedFawwaz For these threeinstructions LEA, LDS and LES the effective address could be formed of all or any various combinations of the three elements in Fig 4 �� = ��� ��� + ��� ��� + � 8 − ��� ������������ 16 − ��� ������������� Fig 4The three element used to compute an effective address Example 4: For the figure below, what is the result of executing the following instruction? LEASI , [ DI + BX +2H] Solution: SI= DI + BX +2H = 0062H Example 5 : Instruction Sample Result LEA SI , [ BX + SI + 55 ] Valid SI= BX + SI + 55 LEA SI , [ BX + SI ] Valid SI= BX + SI LEA BP , [ 890C ] valid BP= 890C LEA AX , [ BX + SI + 20 ] Valid AX = BX + SI + 20 LEA DI , [ BP + DI + 55 ] Valid DI = BP + DI + 55 LEA DI , [ DI + DI + 55 ] Not valid because EA doesn’t involve DI twice LEA CS , [ BP + DI + 55 ] Not valid because destination cant be segment register LEA IP , [ BP +550C ] Not valid because destination cant be instruction pointer LEA AX , [ CX + DI + 1D ] Not valid because EA doesn’t involve CX LEA AL , [ DI + 103D ] Not valid because destination must be 16 bit Example 6:What is the result after executing each one of the next instructions? LEA BP, [F004] MOV BP, F004 MOV BP, [F004] DS 0100 SI F002 Before After DI 0020 AX 0003 BX 0040 DS 0100 SI 0062 DI 0020 AX 0003 BX 0040 01047 01046 01045 01044 01043 01042 01041 01040 34 12 DF DD 90 68 A2 55 01047 01046 01045 01044 01043 01042 01041 01040 34 12 DF DD 90 68 A2 55 Department of Control and Systems Engineering Lecture 4 – Page 4 of 4 Third Year - Microprocessors By Mr.WaleedFawwaz Solution: Instruction Result LEA BP, [F004] The value F004 will be assigned to the Base Pointer MOV BP, F004 The value F004 will be assigned to the Base Pointer MOV BP, [F004] The wordat memory locations F004 and F005 in the current Data Segment will be assigned to Base Pointer The instruction LES is similar to the instruction LDS except that it load the Extra Segment Register instead of Data Segment Register

2. Arithmetic instruction