Figure 7-8 An 8×8 Banyan Switch
This approach would simply generate unnecessary traffic in ATM switching networks and possibly cause performance degradation. It is much more desirable to push the copying process as close as
possible to the destination nodes in the network. Therefore, it is essential that ATM switching networks provide these capabilities at the switching hardware.
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Copyr ight © CRC Pr ess LLC
by Abhijit S. Pandya; Ercan Sen CRC Press, CRC Press LLC
ISBN: 0849331390 Pub Date: 110198
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VI. ATM Switch Architectures
In this section we survey the most widely used switching architectures in the industry. In general an ATM switching system is built around a switching network of varying complexity or a common ATM cell bus structure as shown in Figure 7-9.
Smaller ATM switches designed for workgroup, campus, and access multiplexerconcentrator applications use a small crossbar switch or ATM cell bus architecture to provide a cell path between various application specific Line Interface
Modules LIM. This approach is mainly driven by a lower cost factor. On the other hand, larger ATM switches designed for core networks use more sophisticated switching fabrics. In this case, the scalability is the main factor for choosing a
particular switching fabric.
Each application segment has a particular range of bandwidth requirements. When designing an ATM system for a particular segment, the bandwidth requirement plays an important role in determining the switching architecture. Table 7-1
lists typical bandwidth requirements for some of these application segments.
A typical switching fabric is designed by combining several switching ICs in a particular formation. These switching ICs are the basic building blocks of any switching fabric. Some of these ICs require additional ICs to provide a common ATM
interface to application specific LIMs.
The most common interface is the standard UTOPIA interface. As an example, we look at Siemens ATM chipsets to build various switching fabric sizes with a standard UTOPIA interface. Figure 7-10 shows a basic building block of a switching
network using the Siemens chipset. It is possible to place the ASP chips on the LIM cards and have a SLIF interface between the LIM cards and the switching fabric. It is also possible to place the ASP chips on the switching modules to have
a UTOPIA interface between LIMs and the switching fabric. This decision depends strictly on requirements of a particular design of an ATM system.
The core component of the Siemens switching chipset is the 32×16 ATM Switching Matrix ASM. The block diagram of the ASM chip is shown in Figure 7-11. The ASM chip is a self-routing and nonblocking switch. It also provides a multicast
function. The ASM chip uses the central buffering concept. It interfaces with other support chips via a custom ATM interface called Switch Link Interface SLIF.
SLIF expands the standard 53 octet ATM cells into 64 octet cells by adding additional header information, synchronization, checksum and cell sequence number octets. The main purpose of the additional header information at the SLIF interface is
to speed up the routing function in the ASM chip.
Figure 7-9 Typical ATM switching architecture.
Table 7-1Bandwidth requirements for various application segments Application Segment
Bandwidth Requirement
Workgroup 1.2 Gbps - 5 Gbps
Campus Backbone 2.5 Gbps - 10 Gbps
Enterprise 2.5 Gbps - 20 Gbps
WAN Backbone 2.5 Gbps - 40 Gbps
Access MultiplexerConcentrator 155 Mbps - 2.5 Gbps
Multiservice Access Switch 10 Gbps - 40 Gbps
