MPOA Architecture Multi-Protocol over ATM MPOA

by Abhijit S. Pandya; Ercan Sen CRC Press, CRC Press LLC ISBN: 0849331390 Pub Date: 110198 Previous Table of Contents Next

B. AAL1 Structure

The Nx64 operation uses the AAL1 Structured Data Transfer SDT mode as described in ITU-T I.363.1. The AAL1 format used for the CES operation is shown in Figure 9-19. When N=1 i.e., the SDT block carries only one time slot, the AAL1 block pointer is not needed. In this case, the Non-Pointer Non-P format with 47-octet payload is used. When N 1, the Pointer P format with 46-octet payload is used. The 1-octet SAR PDU header contains a 4-bit Sequence Number SN field and a 4-bit Sequence Number Protection SNP field. The SN field includes a 1-bit Convergence Sublayer Indicator CSI to indicate the existence of a Convergence Sublayer and a 3-bit Sequence Counter SC to make sure that the SAR PDUs are received at a destination in the proper order they are sent from a source. The SNP field contains a 3-bit CRC and 1-bit even parity fields to provide error detection and correction for the SN field. When operating in the basic structured mode without CAS signaling, a block is formed by combining the time-slots belonging to this particular Nx64 channel in the order they are received from the physical PDH interface in a single frame. This format is shown in Figure 9-20. When the Structured with CAS mode is used, the SDT payload is divided into two subsections: the first section contains time slots corresponding to this Nx64 channel from the multiframe PDH data; the second section contains the CAS signaling A, B, C, and D signaling bits for these time-slots. This format is illustrated in Figure 9-20.

C. Timing

There are two methods defined for synchronization between source and the destination CBR devices: synchronous and asynchronous clocking modes. In the synchronous clocking mode, both source and destination CBR end-devices attached to the CES-IS entities are synchronized to a reference clock, Primary Reference Source PRS, from the network through CES- IS entities. In the asynchronous clocking mode, both source and destination end-devices run without synchronizing to the network clock PRS. Figure 9-18 Unstructured CES-IWF protocol architecture. Figure 9-19 AAL1 format for CES.