The Shared Memory Switch

THE ATM ADAPTATION LAYER 63 Physical Higher Layers AAL ATM Figure 3.12 The ATM adaptation layer. SAP Service Specific Convergence Sublayer SSCS Common Part Sublayer CPS Segmentation and Reassembly Convergence Sublayer SAP Figure 3.13 The ATM adaptation sublayers. related functions, depending on where the ATM cell is currently located: at the transmitting side or at the receiving side. At the transmitting side, SAR segments higher-level layer PDUs into a suitable size for the information field of an ATM cell. At the receiving side, it reassembles the information fields of ATM cells into higher-level layer PDUs. Four ATM Adaptation Layers have been standardized: ATM adaptation layer 1 AAL 1, ATM adaptation layer 2 AAL 2, ATM adaptation layer 34 AAL 34 , and ATM adaptation layer 5 AAL 5 . Of these, all are currently used except for AAL 34. An additional ATM adaptation layer, the signaling ATM adaptation layer SAAL, was defined to support the ATM signaling protocols. SAAL is described in Chapter 5.

3.7.1 ATM Adaptation Layer 1 AAL 1

AAL 1 can be used for applications such as circuit emulation services, constant-bit rate video, and high-quality constant-bit rate audio. It provides transfer of constant-bit rate data, delivery at the same bit rate, and transfer of timing information between the sending and receiving applications. Also, it can handle cell delay variation and detect lost or misrouted cells. AAL 1 consists of a SAR sublayer and a CS. The SAR sublayer is responsible for the transport and bit error detection, and possibly correction, of blocks of data received from CS. The CS performs a variety of functions. These functions include handling cell delay variation, processing the sequence count, transferring structured and unstructured data, and transferring timing information. 64 ATM NETWORKS The AAL 1 SAR sublayer The SAR sublayer accepts blocks of 47 bytes from the CS and adds a 1-byte header to form the SAR-PDU. The SAR-PDU is then passed on to the ATM layer, where it gets encapsulated with a 5-byte ATM header. The ATM cell is then passed on to the physical layer, which transmits it out. At the receiving SAR sublayer, the 1-byte header is stripped and the payload of the SAR-PDU is delivered to the receiving CS. The encapsulation of the SAR-PDU is shown in Figure 3.14. The header consists of two fields: the sequence number SN field and the sequence number protection SNP field. Both fields are 4 bits long. The SN field contains the subfields: • Convergence sublayer indication CSI : It carries an indication that is provided by the CS. The default value of the CSI bit is 0. • Sequence count : Provided by the transmitting CS, this field is associated with the block of data in the SAR-PDU. The count starts at 0 and is increased sequentially modulo 8. The receiving CS uses the sequence count to detect lost or misinserted cells. The SNP field contains the following two subfields: • CRC-3 : It is computed over the CSI and sequence count fields. • Parity : Even parity bit used calculated over the CSI, sequence count, and CRC-3 fields. The transmitting SAR computes the FCS for the first four bits of the header and inserts it into the CRC-3 field. The pattern used to compute the FCS is given by the polynomial: x 3 + x + 1. After completing the CRC operation, the transmitting AAL calculates the even parity bit on the first seven bits of the header and inserts the result in the parity field. The receiving SAR examines each SAR-PDU header by checking the FCS and the even parity bit. The state machine that controls the receiver’s error detection and correction scheme is the same as the header error control scheme used for the ATM header see Section 3.2; see also Figure 3.4. At initialization, the state machine is set to the correction mode. Each time an SAR-PDU comes in, the FCS and the parity bit are checked. If no errors are found, the SN field is declared as valid and the state machine remains in the correction mode. If a single-bit error is detected, then it is corrected and the SN field is declared as valid, but the state machine switches to detection mode. If a multi-bit error is detected, then SN field is declared as invalid and the state machine switches to detection mode. In detection mode, the FCS and the parity bit are checked each time an SAR-PDU comes in; if a single-bit or a multi-bit error is detected, then the SN field is declared as payload SAR Header 47 bytes SN SNP CRC-3 3 bits Parity 1 bit 3 bits 1 bit CSI Seq. count Figure 3.14 The SAR encapsulation for AAL 1.