Bipolar, PMOS Bipolar, PMOS NMOS NMOS CMOS CMOS CMOS, Voltage scaling CMOS, Voltage scaling CMOS, Power efficient CMOS, Power efficient nm gate oxide, 35 nm gate length for improved nm gate oxide, 35 nm gate length for improved
33
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Si l i con Technol ogy Changes to Si l i con Technol ogy Changes to
Increase Power Effi ci ency Increase Power Effi ci ency
Mid Mid
- -
1960 1960
’ ’
s: Bipolar, PMOS s: Bipolar, PMOS
Mid Mid
- -
1970 1970
’ ’
s: NMOS s: NMOS
Mid Mid
- -
1980 1980
’ ’
s: CMOS s: CMOS
Mid Mid
- -
1990 1990
’ ’
s: CMOS, Voltage scaling s: CMOS, Voltage scaling
Mid Mid
- -
2000 2000
’ ’
s: CMOS, Power efficient s: CMOS, Power efficient
Moore’s Law
34
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Source: Intel, VLSI Technology Symposium 604
1 10
100 1000
0.2 0.4
0.6 0.8
1.0 1.2
1.4 1.6
Transistor Transistor
Drive Current Drive Current
mA mA
um um
Transistor Leakage
Current
nAum
Std
Std Strain
Strain
+25 I
ON
+10 I
ON
0.04x I
OFF
0.20x I
OFF
PMOS NMOS
15 15
90nm Strai ned Si l i con Saves 90nm Strai ned Si l i con Saves
Power 1.2V Power 1.2V
5X to 25X reduction in transistor leakage power 5X to 25X reduction in transistor leakage power
35
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65 nm Generati on Transi stors 65 nm Generati on Transi stors
y y
1.2 nm gate oxide, 35 nm gate length for improved 1.2 nm gate oxide, 35 nm gate length for improved
performance performance
y y
220 nm contacted gate pitch for improved density 220 nm contacted gate pitch for improved density
y y
NiSi for low resistance cap on gates and source NiSi for low resistance cap on gates and source
- -
drains drains
y y
Intel Intel
’ ’
s unique s unique
uniaxial uniaxial
strained silicon technology, first strained silicon technology, first
introduced on the 90 nm generation, is further introduced on the 90 nm generation, is further
enhanced on 65 nm transistors for improved enhanced on 65 nm transistors for improved
performance performance
y y
At the 65 nm generation, strained silicon improves At the 65 nm generation, strained silicon improves
performance ~30 relative to non performance ~30 relative to non
- -
strain strain
Intel has developed a second generation of strained silicon technology while others are still struggling to develop their first generation
36
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1 10
100 1000
0.2 0.4
0.6 0.8
1.0 1.2
I
ON
mAum
I
OFF
nAum
PMOS NMOS
90 nm 2002
2004
65 nm 2004