Space-vector Transformation in CSIs
A. Space-vector Transformation in CSIs
Similarly to VSIs, the vector of three-phase line-modulating
° ] can be represented by the com-
signals i 100 abc c = [i ca i cb i cc T
c =i c = [i cα i cβ ] by means of Eqs. (15.36) 90 °
and (15.37). For three-phase balanced sinusoidal modulating
80 ° waveforms, which feature an amplitude ˆi c and an angular fre- quency ω, the resulting modulating signals complex vector
2 c =i c becomes a vector of fixed module ˆi c , which rotates 60 °
at frequency ω (Fig. 15.33). Similarly, the SV transformation 50 °
is applied to the line currents of the nine states of the CSI nor- malized with respect to i i , which generates nine space vectors
1 6 are non- 30 °
i ,i
7 8 9 are null line current 20 °
vectors.
The SV technique approximates the line-modulating sig- 10 °
c i ,i = oa1 0 i °
α 1 i ˆ /i
i +1 i i +1 FIGURE 15.31 Chopping angles for SHE and fundamental current
0 0.2 0.4 0.6 0.8 1.0 i
7 8 9 ) should be control in three-phase CSIs: fifth and seventh harmonic elimination.
c . To ensure that the generated current in
382 J. R. Espinoza S a1
0.8·i i
(b) (d) FIGURE 15.32 The three-phase CSI. Ideal waveforms for the SHE technique: (a) VSI gating pattern for fifth and seventh harmonic elimina-
tion; (b) CSI gating pattern for fifth and seventh harmonic elimination; (c) line current i oa for fifth and seventh harmonic elimination; and (d) spectrum of (c).
B. Space-vector Sequences and Zero Space-vector Selection vector → → i
modulating
Although there is no systematic approach to generate a SV c =i c αβ
sector number
2 i = i i + 1 sequence, a graphical representation shows that the sequence
z depends upon the sector) state provides high performance in terms of minimizing unwanted
2 1 i i +1 z
harmonics and reducing the switching frequency. To obtain
3 i 1 =i i
the zero SV that minimizes the switching frequency, it is assumed that I c is in Sector ➁. Then Fig. 15.34 shows all
Possible
Initial state
Zero Vector
Final state
i 7 = {1, 4} 4 5 1 2
1 → → (a) i = {1, 2} i = {3, 6} i 2 = {2, 3}
FIGURE 15.33 → The space-vector representation in CSIs. i
on switches
number of commutations
minimum number
i 7 = {1, 4}
of commutations
one sampling period T s (made up of the currents provided by
i i +1
z used during times T i ,T i +1 , and T z ) (b) → i
c , the following expressions
should hold:
T i =T s · ˆi c · sin(π/3 − θ)
T i +1 =T s · ˆi c · sin(θ)
where 0 ≤ ˆi c ≤ 1. Although, the SVM technique selects the 9 vectors to be used and their respective on-times, the sequence FIGURE 15.34 Possible state transitions in Sector ➁ involving a zero
in which they are used, the selection of the zero space vector,
and the normalized sampled frequency remain undetermined.
15 Inverters 383 TABLE 15.6 Zero SV for minimum switching
where V on is the rms ac output phase voltage, I o1 is the rms fun-
i i +1 z
damental line current, and φ is an arbitrary filter-load angle.
Hence, the dc link voltage expression can be further simplified
Sector
to the following:
I o1
√ I o1
2 3 8 v i (t ) =3 V on cos(φ) = 3 V o cos(φ) (15.62)
5 6 8 where V o = 3V on is the rms load line voltage. The resulting
dc link voltage expression indicates that the first line-current harmonic I o1 generates a clean dc current. However, as the load line currents contain harmonics around the normalized sampling frequency f sn , the dc link current will contain har- monics but around f sn as shown in Fig. 15.35h. Similarly, in
the possible transitions that could be found in Sector ➁. It can carrier-based PWM techniques, the dc link current will contain
9 should be chosen to minimize harmonics around the carrier frequency m f (Fig. 15.27). the switching frequency. Table 15.6 gives a summary of the zero
In practical implementations, a CSI requires a dc current space vector to be used in each sector in order to minimize the source that should behave as a constant (as required by PWM switching frequency. However, should be noted that Table 15.6 CSIs) or variable (as square-wave CSIs) current source. Such
i +1 z . Another sequence current sources should be implemented as separate units and will require reformulating the zero space-vector selection they are described earlier in this book. algorithm.
C. The Normalized Sampling Frequency
15.5 Closed-loop Operation of Inverters
As in VSIs modulated by a SV approach, the normalized sam- pling frequency f sn should be an integer multiple of 6 to min-
Inverters generate variable ac waveforms from a dc power sup- imize uncharacteristic harmonics. As an example, Fig. 15.35 ply to feed, for instance, ASDs. As the load conditions usually shows the relevant waveforms of a CSI SVM for f sn = 18 and ˆi change, the ac waveforms should be adjusted to these new con-
c = 0.8. Figure 15.35 also shows that the first set of relevant ditions. Also, as the dc power supplies are not ideal and the harmonics load line current are at f sn .
dc quantities are not fixed, the inverter should compensate for such variations. Such adjustments can be done automatically by means of a closed-loop approach. Inverters also provide
an alternative to changing the load operating conditions (i.e. An instantaneous power balance indicates that
15.4.5 DC Link Voltage in Three-phase CSIs
speed in an ASD).
There are two alternatives for closed-loop operation the feedback and the feedforward approaches. It is known that
v i (t ) ·i i (t ) =v an (t ) ·i oa (t ) +v bn (t ) ·i ob (t ) +v cn (t ) ·i oc (t ) the feedback approach can compensate for both the pertur- (15.60) bations (dc power variations) and the load variations (load
torque changes). However, the feedforward strategy is more where v an (t ), v bn (t ), and v cn (t ) are the phase filter voltages effective in mitigating perturbations as it prevents its negative
as shown in Fig. 15.36. If the filter is large enough and a effects at the load side. These cause-effect issues are analyzed in relatively high switching frequency is used, the phase voltages three-phase inverters in the following, although similar results become nearly sinusoidal balanced waveforms. On the other are obtained for single-phase VSIs. hand, if the ac output currents are considered sinusoidal and the dc link current is assumed constant i i (t ) =I i , Eq. (15.60) can be simplified to
15.5.1 Feedforward Techniques in Voltage
Source Inverters
⎪ ⎪ 2V on sin(ωt ) · 2I o1 sin(ωt −φ)
⎪ ⎪ ⎪ The dc link bus voltage in VSIs is usually considered a constant
i (t ) = + 2V on sin(ωt −120 ◦
) · 2I o1 sin(ωt −120 ◦ −φ)
voltage source v i . Unfortunately, and due to the fact that most
⎪ ⎪ practical applications generate the dc bus voltage by means of
+ 2V on sin(ωt −240 ◦ ) · 2I o1 sin(ωt
a diode rectifier (Fig. 15.37), the dc bus voltage contains low- (15.61) order harmonics such as the sixth, twelfth, . . . (due to six-pulse
384 J. R. Espinoza
0.8·i i
FIGURE 15.35 The three-phase CSI. Ideal waveforms for space-vector modulation (ˆi c = 0.8, f sn = 18): (a) modulating signals; (b) switch S 1 state; (c) switch S 3 state; (d) ac output current; (e) ac output current spectrum; (f) ac output voltage; (g) dc voltage; (h) dc voltage spectrum; (i) switch S 1 current; and (j) switch S 1 voltage.
diode rectifiers), and the second if the ac voltage supply features an unbalance, which is usually the case. Additionally, if
the three-phase load is unbalanced, as in UPS applications, the
a la dc input current in the inverter i i also contains the second har- +
i oa
CSI
monic, which in turn contributes to the generation of a second
an
ab voltage harmonic in the dc bus.
b − lc n + v cn
i ob
The basic principle of feedforward approaches is to sense
the perturbation and then modify the input in order to com- −
pensate for its effect. In this case, the dc link voltage should
be sensed and the modulating technique should accordingly FIGURE 15.36 Phase-voltage definition in a wye-connected filter.
be modified. The fundamental ab line voltage in a VSI SPWM be modified. The fundamental ab line voltage in a VSI SPWM
can be written as
270 360 where ˆv is the carrier signal peak, ˆv ca1 and ˆv cb1 are the mod-
(a)
ulating signal peaks, and v ca (t ) and v ca (t ) are the modulating
v ca v cb v signals. If the dc bus voltage v cc
i varies around a nominal V i
value, then the fundamental line voltage varies proportionally;
however, if the carrier signal peak ˆv is redefined as
where ˆv m is the carrier signal peak (Fig. 15.38), then the
v ab v ab 1
resulting fundamental ab line voltage in a VSI SPWM is %v ca1 (t )
where, clearly, the result does not depend upon the variations
(c)
of the dc bus voltage.
v ab
Figure 15.39 shows the waveforms generated by the SPWM
0.8·0.866·v i
under a severe dc bus voltage variation (a second harmonic has been added manually to a constant V i ). As a consequence, the
ac line voltage generated by the VSI is distorted as it contains f 1 3 5 79 11 13 15 17 19 21 23 25 27 29 31 f o
(d)
a FIGURE 15.39 The three-phase VSI. Waveforms for regular SPWM +
i oa
(m a = 0.8, m f = 9): (a) dc bus voltage; (b) carrier and modulating C + VSI v − an v v
ab signals; (c) ac output voltage; and (d) ac output voltage spectrum. N
low-order harmonics (Fig. 15.39e). These operating condi- tions may not be acceptable in standard applications such as
v Δm v ASDs because the load will draw distorted three-phase cur-
S 1-6
1/V Carrier-based
rents as well. The feedforward loop performance is illustrated in Fig. 15.40. As expected, the carrier signal is modified so as to
Modulation Technique
FIGURE 15.38 The three-phase VSI. Feedforward control technique to compensate for the dc bus voltage variation (Fig. 15.40b). This reject dc bus voltage variations.
is probed by the spectrum of the ac line voltage that does not
386 J. R. Espinoza v ca v cb v cc approach. For instance, the SVM techniques indicate that the
on-times of the vectors i , i +1 , and z are
ωt
T i =T s · ˆv c · sin(π/3 − θ) (15.66)
T i +1 =T s · ˆv c · sin(θ) (15.67)
(a)
T z =T s −T i −T i +1 (15.68)
v ca v cb v cc
respectively, where ˆv c is the amplitude of the desired ac line voltage, as shown in Fig. 15.18. By redefining this quantity to
≤1 (15.69) v i (t )
(b)
where V
i is the nominal dc bus voltage and v i (t ) is the actual
ab ab1
dc bus voltage. Thus, the on-times become
· sin(θ) (15.71) v i (t )
v ab 0.8·0.866·v
i +1
T z =T s −T i −T i (15.72)
where ˆv cm is the desired maximum ac line voltage. The pre-
f vious expressions account for dc bus voltage variations and
1 3 5 79 11 13 15 17 19 21 23 25 27 29 31 f o
behave as a feedforward loop as it needs to sense the perturba-
tion in order to be implemented. The previous expressions are valid for the linear region, thus ˆv c is restricted to 0 ≤ ˆv c ≤ 1, FIGURE 15.40 The three-phase VSI. Waveforms for SPWM including a
(d)
which indicates that the compensation is indeed limited.
feedforward loop (m a = 0.8, m f = 9): (a) carrier and modulating signals;
(b) modified carrier and modulating signals; (c) ac output voltage; and (d) ac output voltage spectrum.
15.5.2 Feedforward Techniques in Current