Selective Harmonic Elimination

C. Selective Harmonic Elimination

over- modulation

The main objective is to obtain a sinusoidal ac output volt-

age waveform where the fundamental component can be linear

region

adjusted arbitrarily within a range and the intrinsic harmon- region

square

wave

ics selectively eliminated. This is achieved by mathematically generating the exact instant of the turn-on and turn-off of the power valves. The ac output voltage features odd half- and quarter-wave symmetry; therefore, even harmonics are not present (v oh = 0, h = 2, 4, 6, . . .). Moreover, the phase voltage waveform (v o

m a =v aN in Fig. 15.2), should be chopped N times per half-cycle in order to adjust the fundamental and

FIGURE 15.4 Normalized fundamental ac component of the output eliminate N − 1 harmonics in the ac output voltage wave- voltage in a half-bridge VSI SPWM modulated.

form. For instance, to eliminate the third and fifth harmonics

362 J. R. Espinoza and to perform fundamental magnitude control (N = 3), the (N − 1 = 2, 4, 6, . . .) number of harmonics are

equations to be solved are the following:

(2 + πˆv o1 )/v i

cos(1α 1 ) − cos(1α 2 ) + cos(1α 3 ) = (2 + πˆv o1 /v i )/4

( −1) cos(α k ) =

k =1

cos(3α 1 ) − cos(3α 2 ) + cos(3α 3 ) = 1/2

cos(5α 1 ) − cos(5α 2 )

3 ) + cos(5α k = 1/2 − ( −1) cos(nα

for n = 3, 5, . . . , 2N − 1

k =1

(15.9) Fig. 15.6a. The angles are found by means of iterative algorithms as no analytical solutions can be derived. The angles where α 1 ,α 2 ,…, α N should satisfy α 1 <α 2 < · · ·<α N <π /2. α 1 ,α 2 , and α 3 are plotted for different values of ˆv o1 /v i in Similarly, to eliminate an odd number of harmonics, for Fig. 15.7a. The general expressions to eliminate an even N −1 instance the third, fifth, and seventh, and to perform the

where the angles α 1 ,α 2 and α 3 are defined as shown in

FIGURE 15.6 The half-bridge VSI. Ideal waveforms for the SHE technique: (a) ac output voltage for third and fifth harmonic elimination; (b) spectrum of (a); (c) ac output voltage for third, fifth, and seventh harmonic elimination; and (d) spectrum of (c).

FIGURE 15.7 Chopping angles for SHE and fundamental voltage control in half-bridge VSIs: (a) third and fifth harmonic elimination and (b) third, fifth, and seventh harmonic elimination.

15 Inverters 363 fundamental magnitude control (N − 1 = 3), the equations to v i (t ) =V i , Eq. (15.12) can be simplified to

be solved are:

cos(1α 1 ) −cos(1α 2 ) +cos(1α 3 ) −cos(1α 4 ) =(2−πˆv o1 /v i )/4

i i (t ) ·dt =

2V o1 sin(ωt ) · 2I o sin(ωt −φ)·dt =I i

cos(3α 1 ) −cos(3α 2 ) +cos(3α 3 ) −cos(3α 4 ) =1/2

cos(5α 1 ) −cos(5α 2 ) +cos(5α 3 ) −cos(5α 4 ) =1/2

where V o1 is the fundamental rms ac output voltage, I o is the

cos(7α 1 ) −cos(7α 2 ) +cos(7α 3 ) −cos(7α 4 ) =1/2

rms load current, φ is an arbitrary inductive load power factor, (15.10) and I i is the dc link current that can be further simplified to

V o1

I o cos(φ) (15.14)

where the angles α 1 ,α 2 ,α 3 , and α 4 are defined as shown in

Fig. 15.6b. The angles α 1 ,α 2 , and α 3 are plotted for different

values of ˆv o1 /v i in Fig. 15.7b. The general expressions to elimi-

15.2.2 Full-bridge VSI

nate an odd N − 1 (N − 1 = 3, 5, 7, . . .) number of harmonics are given by

Figure 15.8 shows the power topology of a full-bridge VSI. This inverter is similar to the half-bridge inverter; however,

a second leg provides the neutral point to the load. As expected, ! N

cos(nα k ) − − ) cannot be on −1) =

both switches S 1 + and S 1 − (or S 2 + and S 2 (

(2 − πˆv o1 )/v i

4 simultaneously because a short circuit across the dc link voltage

source v i would be produced. There are four defined (states 1, ! N

1 2, 3, and 4) and one undefined (state 5) switch state as shown −

( −1) k cos(nα k ) =

for n = 3, 5, . . . , 2N − 1

in Table 15.2.

The undefined condition should be avoided so as to be (15.11) always capable of defining the ac output voltage always. In

order to avoid the short circuit across the dc bus and the unde- fined ac output voltage condition, the modulating technique

where α 1 ,α 2 , . . ., α N should satisfy α 1 <α 2 < · · ·<α N <π /2.

should ensure that either the top or the bottom switch of each To implement the SHE modulating technique, the modula- leg is on at any instant. It can be observed that the ac output

tor should generate the gating pattern according to the angles voltage can take values up to the dc link value v i , which is twice as shown in Fig. 15.7. This task is usually performed by digital that obtained with half-bridge VSI topologies. systems that normally store the angles in look-up tables.

Several modulating techniques have been developed that are applicable to full-bridge VSIs. Among them are the PWM (bipolar and unipolar) techniques.