LV D T T ECHNIQUES
LV D T T ECHNIQUES
A linear variable differential transformer (LVDT) is an electromechani- cal mechanism that provides a voltage reference that is proportional to the displacement of a core inside a coil. Figure 13-6 illustrates a cutaway and a diagram of an LVDT, while Table 13-2 lists the types of transducers that use LVDT mechanisms.
An AC voltage, when applied to the primary coil, creates an induced voltage in the secondary coils of an LVDT. As the LVDT’s core (which is made of
a magnetic material) moves, the voltage at the output of the secondary coil changes. The induced voltage created by the core movement and the way the secondary coils are wound determine the value of the voltage change (see Figure 13-7). The secondary coil is wound in the opposite direction of the primary, so that the induced voltage will change polarity as the coil moves.
Industrial Text & Video Company 1-800-752-8398
www.industrialtext.com
S ECTION PLC Process Data Measurements C HAPTER 4 Applications
and Transducers 13
Stainless steel housing and end lids provide electrostatic and
Coil
Vacuum and pressure im-
electromagnetic shielding.
pregnation with high
grade electrical varnish
Housing is spun-swagged
adds additional mois-
over end lids to produce
ture proofing, thermal
tight seal
stability, and structural
(a)
e e High density, glass filled pol- ri ymer coil form has low mois-
integrity to the coils
n g ture absorption and excellent in z thermal stability. Coil movement E
a e v due to moisture breathing is eliminated it Core
High permeability, nickel-iron hydro- Epoxy Encapsulation assures S f y proper heat transfer and bonding o gen-annealed core for low harmonics, s
low null voltage, and high sensitivity of coils to housing e rt
Output Voltage
Input Voltage
Figure 13-6. (a) Cutaway and (b) diagram of an LVDT.
Table 13-2. Transducers that use LVDT mechanisms.
Industrial Text & Video Company 1-800-752-8398
www.industrialtext.com
S ECTION PLC Process Data Measurements C HAPTER 4 Applications
and Transducers 13
Voltage Out (+)
150 Core Position (% Nominal Range)
Extended
Voltage Out
Extended
Range
Opposite Phase
Nominal Range
Linearity
Linear Range
Core at –100%
Core at 0
Core at –100%
(Null Position)
Figure 13-7. LVDT core movement and output voltage.
Modern LVDTs provide demodulation, or rectification, circuits to convert the secondary output into a DC voltage signal. This voltage signal is in linear proportion to the core movement within its range. The resultant voltage when the core is at its starting position is +V; when the core is at its end position the resultant voltage is –V. When the core is at the middle, it provides a null, or zero, voltage output. Figure 13-8 illustrates a simple demodulator circuit for an LVDT.
Motion Input
Power Input
C1 1 Output
C2 2 D2 2
Figure 13-8. Demodulator circuit for an LVDT.
Industrial Text & Video Company 1-800-752-8398
www.industrialtext.com
S ECTION PLC Process Data Measurements C HAPTER 4 Applications
and Transducers 13
E X AM PLE 1 3 -5
Graphically illustrate the position of an LVDT core that has a total displacement range of 20 inches and an output of ± 10 VDC.
S OLU T I ON
Figure 13-9 shows the graph for this LVDT core.
Voltage +10 VDC
+ 1 0 V D C Figure 13-9. Position of example LVDT core.
Parts
» An Industrial Text Company Publication Atlanta • Georgia • USA
» C HAPTER T HREE L OGI C C ON CEPT S
» 3 -3 P RINCIPLES OF B OOLEAN A LGEBRA AND L OGIC
» 3 -4 PLC C I RCU I T S AN D L OGI C C ON TACT S Y M BOLOGY
» C ONTACT S YMBOLS U SED IN PLC S
» L OADING C O N S I D E R AT I O N S
» M E M O RY C A PA C I T Y AND U T I L I Z AT I O N
» A P P L I C AT I O N M E M O RY
» D AT A T ABLE O R G A N I Z AT I O N
» 6 -2 I /O R ACK E NCLOSURES AND T ABLE M APPING
» I /O R ACK AND T ABLE M APPING E XAMPLE
» 6 -4 P L C I NSTRUCTIONS FOR D ISCRETE I NPUTS
» 6 -6 P L C I NSTRUCTIONS F OR D ISCRETE O UTPUTS
» 7 -3 A NALOG I NPUT D ATA R E P R E S E N TAT I O N
» 7 -4 A NALOG I NPUT D ATA H ANDLING
» 7 -6 O V E RV I E W OF A NALOG O UTPUT S IGNALS
» 7 -8 A NALOG O UTPUT D ATA R E P R E S E N TAT I O N
» 7 -9 A NALOG O UTPUT D ATA H ANDLING
» C HAPTER E IGHT S PECI AL F U N CT I ON I /O AN D S ERI AL C OM M U N I CAT I ON I N T ERFACI N G
» T HERMOCOUPLE I NPUT M ODULES
» E NCODER /C OUNTER I N T E R FA C E S
» S TEPPER M OTOR I N T E R FA C E S
» S ERVO M OTOR I N T E R FA C E S
» N ETWORK I N T E R FA C E M ODULES
» S ERIAL C O M M U N I C AT I O N
» I N T E R FA C E U SES AND A P P L I C AT I O N S
» 9 -3 L ADDER D IAGRAM F O R M AT
» 9 -5 L ADDER R E L AY P ROGRAMMING L ADDER S CAN E V A L U AT I O N
» P ROGRAMMING N O R M A L LY C LOSED I NPUTS
» 9 -1 0 A RITHMETIC I NSTRUCTIONS
» 9 -1 4 N ETWORK C O M M U N I C AT I O N I NSTRUCTIONS
» L ANGUAGES AND I NSTRUCTIONS
» F UNCTION B LOCK D IAGRAM (FBD)
» S EQUENTIAL F UNCTION C H A RT S (SFC)
» P ROGRAMMING L ANGUAGE N O TAT I O N
» P ROGRAMMING N O R M A L LY C LOSED T RANSITIONS
» D IVERGENCES AND C ONVERGENCES
» -1 C ONTROL T ASK D EFINITION
» C REAT I N G F LOWCH ART S AN D O U T PU T S EQU EN CES
» C ONFIGURING THE PLC S YSTEM
» S PECIAL I NPUT D EVICE P ROGRAMMING
» S IMPLE S TA R T /S TOP M OTOR C IRCUIT
» F O RWA R D /R EVERSE M OTOR I NTERLOCKING
» AC M OTOR D RIVE I N T E R FA C E
» L ARGE R E L AY S YSTEM M O D E R N I Z AT I O N
» A NALOG I NPUT C OMPARISON AND D ATA L INEARIZATION
» A NALOG P OSITION R EADING F ROM AN LV D T
» L INEAR I N T E R P O L AT I O N OF N ONLINEAR I NPUTS
» L ARGE B AT C H I N G C ONTROL A P P L I C AT I O N
» -7 S H O RT P ROGRAMMING E XAMPLES
» -1 B ASIC M EASUREMENT C ONCEPTS D ATA I N T E R P R E TAT I O N
» I NTERPRETING C OMBINED E RRORS
» B RIDGE C IRCUIT T ECHNIQUES
» R ESISTANCE T E M P E R AT U R E D ETECTORS ( RT D S )
» -1 P ROCESS C ONTROL B ASICS
» I N T E R P R E TAT I O N OF E RROR
» T RAN SFER F U N CT I ON S AN D T RAN SI EN T R ESPON SES
» D E R I V AT I V E L APLACE T RANSFORMS
» Out () s = ( )( ) In () s Hp () s
» S ECOND -O RDER L AG R ESPONSES
» D IRECT -A CTING C ONTROLLERS
» T WO -P OSITION D ISCRETE C ONTROLLERS
» T HREE -P OSITION D ISCRETE C ONTROLLERS
» -5 P R O P O RT I O N A L C ONTROLLERS (P M ODE )
» PV () s ( 1 + Hc Hp () s () s ) = SP Hc Hp () s () s () s
» CV () t = K I ∫ 0 Edt + CV ( t = 0 )
» CV ( t = 2 ) = K I 0 Edt + ∫ CV ( t = 1 )
» -7 P R O P O RT I O N A L -I NTEGRAL C ONTROLLERS (PI M ODE )
» -8 D E R I VAT I V E C ONTROLLERS (D M ODE ) S TANDARD D E R I V AT I V E C ONTROLLERS
» -9 P R O P O RT I O N A L -D E R I VAT I V E C ONTROLLERS (PD M ODE )
» -1 2 C ONTROLLER L OOP T UNING
» Z IEGLER –N ICHOLS O PEN -L OOP T UNING M ETHOD
» I TA E O PEN -L OOP T UNING M ETHOD
» S O F T WA R E T UNING M ETHODS
» R ULE -B ASED K NOWLEDGE R E P R E S E N T AT I O N
» S T AT I S T I C A L AND P ROBABILITY A N A LY S I S
» -1 I NTRODUCTION TO F UZZY L OGIC
» -2 H I S T O RY OF F UZZY L OGIC
» -3 F UZZY L OGIC O P E R AT I O N
» F U Z Z I F I C AT I O N C OMPONENTS
» F UZZY P ROCESSING C OMPONENTS
» D E F U Z Z I F I C AT I O N C OMPONENTS
» S YSTEM D ESCRIPTION AND O P E R AT I O N
» M EMBERSHIP F UNCTIONS AND R ULE C R E AT I O N
» IF A = PS AND B = NS THEN C = ZR IF A = PS AND B = NS THEN D = NS
» C HAPTER N INETEEN I /O B US N ET WORK S
» -4 D EVICE B US N ETWORKS B YTE -W IDE D EVICE B US N ETWORKS
» B IT -W IDE D EVICE B US N ETWORKS
» F IELDBUS P ROCESS B US N ETWORK
» P ROFIBUS P ROCESS B US N ETWORK
» I /O B US N ETWORK A DDRESSING
» P ANEL E NCLOSURES AND S YSTEM C OMPONENTS
» -3 N OISE , H E AT , AND V O LTA G E R EQUIREMENTS
» T ROUBLESHOOTING PLC I NPUTS
» -2 P L C S IZES AND S COPES OF A P P L I C AT I O N S
» I NPUT /O UTPUT C O N S I D E R AT I O N S
» C ONTROL S YSTEM O R G A N I Z AT I O N
» E Q U I VA L E N T L ADDER /L OGIC D IAGRAMS
Show more