S AFETY C I R C U I T RY
S AFETY C I R C U I T RY
The PLC system should contain a sufficient number of emergency circuits to either partially or totally stop the operation of the controller or the controlled machine or process (see Figure 20-7). These circuits should be routed outside the controller, so that the user can manually and rapidly shut down the system in the event of total controller failure. Safety devices, like emergency pull rope switches and end-of-travel limit switches, should bypass the controller to operate motor starters, solenoids, and other devices directly. These emergency circuits should use simple logic with a minimum number of highly reliable, preferably electromechanical, components.
Start PLC
Stop PLC
Stop PB1
Stop PB2 CR1
CR1-1 CR1-2
PLC System
To I/O
To I/O Figure 20-7. Emergency circuits hardwired to the PLC system.
Industrial Text & Video Company 1-800-752-8398
www.industrialtext.com
S ECTION Installation PLC Start-Up C HAPTER 6 and Start-Up
and Maintenance 20
Emergency Stops. The system should have emergency stop circuits for every machine directly controlled by the PLC. To provide maximum safety, these circuits should not be wired to the controller, but instead should be left hardwired. These emergency switches should be placed in locations that the operator can easily access. Emergency stop switches are usually wired into master control relay or safety control relay circuits, which remove power from the I/O system in an emergency.
Master or Safety Control Relays. Master control relay (MCR) and safety
control relay (SCR) circuits provide an easy way to remove power from the I/O system during an emergency situation (see Figure 20-8). These control relay circuits can be de-energized by pushing any emergency stop
Start PLC
Stop PLC
Stop PB1
Stop PB2 CR1
CR1-1
PLC System Enable
Input Power
Disable
CR1-2
Input Power
MCR1
MCR1-1 Enable
Output Power
Disable
CR1-3
Output Power
MCR2
MCR2-1
MCR1-2
MCR1-3
To Inputs
To Inputs
MCR2-2
MCR2-3
To Outputs
To Outputs Figure 20-8. Master start control for a PLC with MCRs enabling input and output power.
Industrial Text & Video Company 1-800-752-8398
www.industrialtext.com
S ECTION Installation PLC Start-Up C HAPTER 6 and Start-Up
and Maintenance 20
switch connected to the circuit. De-energizing the control relay coil re- moves power to the input and output devices. The CPU, however, continues to receive power and operate even though all of its inputs and outputs are disabled.
An MCR circuit may be extended by placing a PLC fault relay (closed during normal PLC operation) in series with any other emergency stop condition. This enhancement will cause the MCR circuit to cut the I/O power in the case of a PLC failure (memory error, I/O communications error, etc.). Figure 20-9 illustrates the typical wiring of a master control relay circuit.
L1 L2 L3
Main Disconnect
C Enable
PLC Fault
Stop
Inputs
Contact MCR1
MCR1
Enable Outputs
Disable Outputs
MCR1 MCR2
MCR2 PLC
MCR1
MCR2
To Inputs
To Outputs
Figure 20-9. Circuit that enables/disables I/O power through MCRs and PLC fault
contact detection.
Emergency Power Disconnect. The power circuit feeding the power supply should use a properly rated emergency power disconnect, thus providing a way to remove power from the entire programmable controller system (refer to Figure 20-9). Sometimes, a capacitor (0.47 µ F for 120 VAC,
Industrial Text & Video Company 1-800-752-8398
www.industrialtext.com
S ECTION Installation PLC Start-Up C HAPTER 6 and Start-Up
and Maintenance 20
0.22 µ F for 220 VAC) is placed across the disconnect to protect against an outrush condition. Outrush occurs when the power disconnect turns off the output triacs, causing the energy stored in the inductive loads to seek the nearest path to ground, which is often through the triacs.
Parts
» An Industrial Text Company Publication Atlanta • Georgia • USA
» C HAPTER T HREE L OGI C C ON CEPT S
» 3 -3 P RINCIPLES OF B OOLEAN A LGEBRA AND L OGIC
» 3 -4 PLC C I RCU I T S AN D L OGI C C ON TACT S Y M BOLOGY
» C ONTACT S YMBOLS U SED IN PLC S
» L OADING C O N S I D E R AT I O N S
» M E M O RY C A PA C I T Y AND U T I L I Z AT I O N
» A P P L I C AT I O N M E M O RY
» D AT A T ABLE O R G A N I Z AT I O N
» 6 -2 I /O R ACK E NCLOSURES AND T ABLE M APPING
» I /O R ACK AND T ABLE M APPING E XAMPLE
» 6 -4 P L C I NSTRUCTIONS FOR D ISCRETE I NPUTS
» 6 -6 P L C I NSTRUCTIONS F OR D ISCRETE O UTPUTS
» 7 -3 A NALOG I NPUT D ATA R E P R E S E N TAT I O N
» 7 -4 A NALOG I NPUT D ATA H ANDLING
» 7 -6 O V E RV I E W OF A NALOG O UTPUT S IGNALS
» 7 -8 A NALOG O UTPUT D ATA R E P R E S E N TAT I O N
» 7 -9 A NALOG O UTPUT D ATA H ANDLING
» C HAPTER E IGHT S PECI AL F U N CT I ON I /O AN D S ERI AL C OM M U N I CAT I ON I N T ERFACI N G
» T HERMOCOUPLE I NPUT M ODULES
» E NCODER /C OUNTER I N T E R FA C E S
» S TEPPER M OTOR I N T E R FA C E S
» S ERVO M OTOR I N T E R FA C E S
» N ETWORK I N T E R FA C E M ODULES
» S ERIAL C O M M U N I C AT I O N
» I N T E R FA C E U SES AND A P P L I C AT I O N S
» 9 -3 L ADDER D IAGRAM F O R M AT
» 9 -5 L ADDER R E L AY P ROGRAMMING L ADDER S CAN E V A L U AT I O N
» P ROGRAMMING N O R M A L LY C LOSED I NPUTS
» 9 -1 0 A RITHMETIC I NSTRUCTIONS
» 9 -1 4 N ETWORK C O M M U N I C AT I O N I NSTRUCTIONS
» L ANGUAGES AND I NSTRUCTIONS
» F UNCTION B LOCK D IAGRAM (FBD)
» S EQUENTIAL F UNCTION C H A RT S (SFC)
» P ROGRAMMING L ANGUAGE N O TAT I O N
» P ROGRAMMING N O R M A L LY C LOSED T RANSITIONS
» D IVERGENCES AND C ONVERGENCES
» -1 C ONTROL T ASK D EFINITION
» C REAT I N G F LOWCH ART S AN D O U T PU T S EQU EN CES
» C ONFIGURING THE PLC S YSTEM
» S PECIAL I NPUT D EVICE P ROGRAMMING
» S IMPLE S TA R T /S TOP M OTOR C IRCUIT
» F O RWA R D /R EVERSE M OTOR I NTERLOCKING
» AC M OTOR D RIVE I N T E R FA C E
» L ARGE R E L AY S YSTEM M O D E R N I Z AT I O N
» A NALOG I NPUT C OMPARISON AND D ATA L INEARIZATION
» A NALOG P OSITION R EADING F ROM AN LV D T
» L INEAR I N T E R P O L AT I O N OF N ONLINEAR I NPUTS
» L ARGE B AT C H I N G C ONTROL A P P L I C AT I O N
» -7 S H O RT P ROGRAMMING E XAMPLES
» -1 B ASIC M EASUREMENT C ONCEPTS D ATA I N T E R P R E TAT I O N
» I NTERPRETING C OMBINED E RRORS
» B RIDGE C IRCUIT T ECHNIQUES
» R ESISTANCE T E M P E R AT U R E D ETECTORS ( RT D S )
» -1 P ROCESS C ONTROL B ASICS
» I N T E R P R E TAT I O N OF E RROR
» T RAN SFER F U N CT I ON S AN D T RAN SI EN T R ESPON SES
» D E R I V AT I V E L APLACE T RANSFORMS
» Out () s = ( )( ) In () s Hp () s
» S ECOND -O RDER L AG R ESPONSES
» D IRECT -A CTING C ONTROLLERS
» T WO -P OSITION D ISCRETE C ONTROLLERS
» T HREE -P OSITION D ISCRETE C ONTROLLERS
» -5 P R O P O RT I O N A L C ONTROLLERS (P M ODE )
» PV () s ( 1 + Hc Hp () s () s ) = SP Hc Hp () s () s () s
» CV () t = K I ∫ 0 Edt + CV ( t = 0 )
» CV ( t = 2 ) = K I 0 Edt + ∫ CV ( t = 1 )
» -7 P R O P O RT I O N A L -I NTEGRAL C ONTROLLERS (PI M ODE )
» -8 D E R I VAT I V E C ONTROLLERS (D M ODE ) S TANDARD D E R I V AT I V E C ONTROLLERS
» -9 P R O P O RT I O N A L -D E R I VAT I V E C ONTROLLERS (PD M ODE )
» -1 2 C ONTROLLER L OOP T UNING
» Z IEGLER –N ICHOLS O PEN -L OOP T UNING M ETHOD
» I TA E O PEN -L OOP T UNING M ETHOD
» S O F T WA R E T UNING M ETHODS
» R ULE -B ASED K NOWLEDGE R E P R E S E N T AT I O N
» S T AT I S T I C A L AND P ROBABILITY A N A LY S I S
» -1 I NTRODUCTION TO F UZZY L OGIC
» -2 H I S T O RY OF F UZZY L OGIC
» -3 F UZZY L OGIC O P E R AT I O N
» F U Z Z I F I C AT I O N C OMPONENTS
» F UZZY P ROCESSING C OMPONENTS
» D E F U Z Z I F I C AT I O N C OMPONENTS
» S YSTEM D ESCRIPTION AND O P E R AT I O N
» M EMBERSHIP F UNCTIONS AND R ULE C R E AT I O N
» IF A = PS AND B = NS THEN C = ZR IF A = PS AND B = NS THEN D = NS
» C HAPTER N INETEEN I /O B US N ET WORK S
» -4 D EVICE B US N ETWORKS B YTE -W IDE D EVICE B US N ETWORKS
» B IT -W IDE D EVICE B US N ETWORKS
» F IELDBUS P ROCESS B US N ETWORK
» P ROFIBUS P ROCESS B US N ETWORK
» I /O B US N ETWORK A DDRESSING
» P ANEL E NCLOSURES AND S YSTEM C OMPONENTS
» -3 N OISE , H E AT , AND V O LTA G E R EQUIREMENTS
» T ROUBLESHOOTING PLC I NPUTS
» -2 P L C S IZES AND S COPES OF A P P L I C AT I O N S
» I NPUT /O UTPUT C O N S I D E R AT I O N S
» C ONTROL S YSTEM O R G A N I Z AT I O N
» E Q U I VA L E N T L ADDER /L OGIC D IAGRAMS
Show more