I /O B US N ETWORK A DDRESSING
I /O B US N ETWORK A DDRESSING
Addressing of the I/O devices in an I/O bus network occurs during the configuration, or programming, of the devices in the system. Depending on the PLC, this addressing can be done either directly on the bus network via a PC and a gateway (see Figure 19-39a) or through a PC connected directly to the bus network interface (see Figure 19-39b). It can also be done through the PLC’s RS-232 port (see Figure 19-40). Some I/O bus networks have switches that can be used to define device addresses, while others have a predefined address associated with each node drop.
(a)
Terminator
I/O Bus Network Terminator
I/O Field Devices
I/O Bus Network Terminator
Terminator
Terminator
I/O Field Devices
Figure 19-39. I/O addresses assigned using (a) a PC connected to the network through a gateway and (b) a PC connected directly to the network.
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S ECTION Advanced PLC I/O Bus C HAPTER 5 Topics and Networks
RS-232 PLC Port
Terminator
I/O Bus Network Terminator
I/O Field Devices Figure 19-40. I/O addresses assigned using a PC connected to the PLC’s RS-232 port.
I/O Field Devices
1 9 -7 S U M M A RY OF
I /O B US N ETWORKS
The device and process types of I/O bus networks provide incredible potential system cost savings, which are realized during installation of a control system. These two types of I/O networks can also form part of a larger, networked operation, as shown in Figure 19-41. In this operation, the information network communicates via Ethernet between the main computer system (or a personal computer) and a supervisory PLC. In turn, these PLCs communicate with other processors through a local area control network. The PLCs may also have remote I/O, device bus, and process bus subnetworks. The addition of field devices to this type of I/O network is relatively easy, as long as each field device is compatible with its respective I/O bus network protocol.
The main difference between the device bus and the process bus networks is the amount of data transmitted. This is due to the type of application in which each is used. Device bus networks are used in discrete applications, which transmit small amounts of information, while process bus networks are used in process/analog applications, which transmit large amounts of data. Figure 19-42 shows a graphic representation of these networks based on the potential amount of information that can be transmitted through them.
In terms of cost, a process bus network tends to be more expensive to implement than a device bus network, simply because analog I/O field devices are more expensive. Also, the intelligence built into a process bus network is more costly than the technology incorporated into a device bus network. For example, the CAN, SDS, ASI, ASIC, and InterBus-S chips used in device networks are readily available, standard, off-the-shelf chips, which
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S ECTION Advanced PLC I/O Bus C HAPTER 5 Topics and Networks
Networks 19
Plant Computer System
Information Network (TCP/IP)
to trigger report Conditions
Custom Report Function Block
Report
Finished
passed from variables Values
Press_Var Temp_Var
Variable_1 Variable_2
Local Area Network
I/O Devices
I/O
Device Bus Network
I/O Devices
Discrete I/O Devices
Remote I/O
Process Bus Network
I/O Devices
Process I/O Devices
Figure 19-41. Large plantwide network.
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S ECTION Advanced PLC I/O Bus C HAPTER 5 Topics and Networks
Networks 19
Many
up to 1000 Bytes
Network Information
Byte-wide Device bus
Process Bus Figure 19-42. Network data transmission comparison.
can be purchased at a relatively low cost. Process bus networks, on the other hand, require devices with more sophisticated electronics, such as micropro- cessors, memory chips, and other supporting electronic circuitry, which makes process network I/O devices more expensive. This expense, however, is more than offset by the total savings for system wiring and installation, especially in the modernization of existing operations where wire runs may already be in place.
K EY acyclic message T ERMS bit-wide bus network
byte-wide bus network cyclic message device bus network I/O bus network I/O bus network scanner medium access control (MAC) process bus network tree topology
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Parts
» An Industrial Text Company Publication Atlanta • Georgia • USA
» C HAPTER T HREE L OGI C C ON CEPT S
» 3 -3 P RINCIPLES OF B OOLEAN A LGEBRA AND L OGIC
» 3 -4 PLC C I RCU I T S AN D L OGI C C ON TACT S Y M BOLOGY
» C ONTACT S YMBOLS U SED IN PLC S
» L OADING C O N S I D E R AT I O N S
» M E M O RY C A PA C I T Y AND U T I L I Z AT I O N
» A P P L I C AT I O N M E M O RY
» D AT A T ABLE O R G A N I Z AT I O N
» 6 -2 I /O R ACK E NCLOSURES AND T ABLE M APPING
» I /O R ACK AND T ABLE M APPING E XAMPLE
» 6 -4 P L C I NSTRUCTIONS FOR D ISCRETE I NPUTS
» 6 -6 P L C I NSTRUCTIONS F OR D ISCRETE O UTPUTS
» 7 -3 A NALOG I NPUT D ATA R E P R E S E N TAT I O N
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» 7 -6 O V E RV I E W OF A NALOG O UTPUT S IGNALS
» 7 -8 A NALOG O UTPUT D ATA R E P R E S E N TAT I O N
» 7 -9 A NALOG O UTPUT D ATA H ANDLING
» C HAPTER E IGHT S PECI AL F U N CT I ON I /O AN D S ERI AL C OM M U N I CAT I ON I N T ERFACI N G
» T HERMOCOUPLE I NPUT M ODULES
» E NCODER /C OUNTER I N T E R FA C E S
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» N ETWORK I N T E R FA C E M ODULES
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» 9 -3 L ADDER D IAGRAM F O R M AT
» 9 -5 L ADDER R E L AY P ROGRAMMING L ADDER S CAN E V A L U AT I O N
» P ROGRAMMING N O R M A L LY C LOSED I NPUTS
» 9 -1 0 A RITHMETIC I NSTRUCTIONS
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» L ANGUAGES AND I NSTRUCTIONS
» F UNCTION B LOCK D IAGRAM (FBD)
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» P ROGRAMMING L ANGUAGE N O TAT I O N
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» L ARGE R E L AY S YSTEM M O D E R N I Z AT I O N
» A NALOG I NPUT C OMPARISON AND D ATA L INEARIZATION
» A NALOG P OSITION R EADING F ROM AN LV D T
» L INEAR I N T E R P O L AT I O N OF N ONLINEAR I NPUTS
» L ARGE B AT C H I N G C ONTROL A P P L I C AT I O N
» -7 S H O RT P ROGRAMMING E XAMPLES
» -1 B ASIC M EASUREMENT C ONCEPTS D ATA I N T E R P R E TAT I O N
» I NTERPRETING C OMBINED E RRORS
» B RIDGE C IRCUIT T ECHNIQUES
» R ESISTANCE T E M P E R AT U R E D ETECTORS ( RT D S )
» -1 P ROCESS C ONTROL B ASICS
» I N T E R P R E TAT I O N OF E RROR
» T RAN SFER F U N CT I ON S AN D T RAN SI EN T R ESPON SES
» D E R I V AT I V E L APLACE T RANSFORMS
» Out () s = ( )( ) In () s Hp () s
» S ECOND -O RDER L AG R ESPONSES
» D IRECT -A CTING C ONTROLLERS
» T WO -P OSITION D ISCRETE C ONTROLLERS
» T HREE -P OSITION D ISCRETE C ONTROLLERS
» -5 P R O P O RT I O N A L C ONTROLLERS (P M ODE )
» PV () s ( 1 + Hc Hp () s () s ) = SP Hc Hp () s () s () s
» CV () t = K I ∫ 0 Edt + CV ( t = 0 )
» CV ( t = 2 ) = K I 0 Edt + ∫ CV ( t = 1 )
» -7 P R O P O RT I O N A L -I NTEGRAL C ONTROLLERS (PI M ODE )
» -8 D E R I VAT I V E C ONTROLLERS (D M ODE ) S TANDARD D E R I V AT I V E C ONTROLLERS
» -9 P R O P O RT I O N A L -D E R I VAT I V E C ONTROLLERS (PD M ODE )
» -1 2 C ONTROLLER L OOP T UNING
» Z IEGLER –N ICHOLS O PEN -L OOP T UNING M ETHOD
» I TA E O PEN -L OOP T UNING M ETHOD
» S O F T WA R E T UNING M ETHODS
» R ULE -B ASED K NOWLEDGE R E P R E S E N T AT I O N
» S T AT I S T I C A L AND P ROBABILITY A N A LY S I S
» -1 I NTRODUCTION TO F UZZY L OGIC
» -2 H I S T O RY OF F UZZY L OGIC
» -3 F UZZY L OGIC O P E R AT I O N
» F U Z Z I F I C AT I O N C OMPONENTS
» F UZZY P ROCESSING C OMPONENTS
» D E F U Z Z I F I C AT I O N C OMPONENTS
» S YSTEM D ESCRIPTION AND O P E R AT I O N
» M EMBERSHIP F UNCTIONS AND R ULE C R E AT I O N
» IF A = PS AND B = NS THEN C = ZR IF A = PS AND B = NS THEN D = NS
» C HAPTER N INETEEN I /O B US N ET WORK S
» -4 D EVICE B US N ETWORKS B YTE -W IDE D EVICE B US N ETWORKS
» B IT -W IDE D EVICE B US N ETWORKS
» F IELDBUS P ROCESS B US N ETWORK
» P ROFIBUS P ROCESS B US N ETWORK
» I /O B US N ETWORK A DDRESSING
» P ANEL E NCLOSURES AND S YSTEM C OMPONENTS
» -3 N OISE , H E AT , AND V O LTA G E R EQUIREMENTS
» T ROUBLESHOOTING PLC I NPUTS
» -2 P L C S IZES AND S COPES OF A P P L I C AT I O N S
» I NPUT /O UTPUT C O N S I D E R AT I O N S
» C ONTROL S YSTEM O R G A N I Z AT I O N
» E Q U I VA L E N T L ADDER /L OGIC D IAGRAMS
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