R EGISTER /B C D O UTPUTS
R EGISTER /B C D O UTPUTS
Multibit register/BCD output interfaces provide parallel communication between the processor and an output device, such as a seven-segment LED display or a BCD alphanumeric display. Register output interfaces may also drive small DC loads with low current requirements (0.5 amps). Register
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User DC Supply
C *Typical * Typical value **Ground cable shield at one end only **Ground cable shield at one end only
(Chassis mounting bolt)
Figure 6-43. Connection diagram for a TTL output module.
output interfaces provide voltages ranging from 5 VDC (TTL level) to 30 VDC and have 16 or 32 output lines (one or two I/O registers). Figure 6-44 illustrates a typical device interface connection for a register output module.
Least Significant Bit
LED Display
02 1s Units
04 05 Each output 0 06 0 controls 10s Units
in the output 11
1 100s Units
1 1000s Units
+V COM
Most Significant Bit Figure 6-44. Register/BCD output interface connected to seven-segment indicators.
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In a register output module, the information sent to the module originates in the register storage data table (see Figure 6-45). A 16-bit word or register is sent from this table to the module address specified by the data transfer or I/O register instruction (e.g., block transfer out). Once the data arrives at the module, it is latched and made available at the output circuits.
Block transfer
out instruction
D Data
Word/Register Storage
Figure 6-45. Output data table sending a 16-bit word to a register output module.
Register output modules may also have multiplexing capabilities (see Figure 6-46). As is the case with multiplexed inputs, multiplexed output devices (e.g., BCD display digits) require enable line capability to select the BCD display group that will receive the parallel, 16-bit data from the module (see Figure 6-47). A single-digit seven-segment display will be able to receive data if the enable is selected. Conversely, if the enable is not selected, the
Memory Digits
Register 4th
D BCD#1
BCD#2
BCD#3 BCD#4
Figure 6-46. Multiplexed output module.
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Enable
Enable
Not Selected
Selected
No input received
Input received
from module Figure 6-47. Single-digit seven-segment BCD display with enable line.
from module
display will be blank or will contain the last data that was latched, because it may latch the data until the enable reselected and new data is available. If the BCD display contains four digits and one enable line (see Figure 6-48), the operation will be the same, except that the enable will control all four displays. With this option, one interface can control several groups of 16 or
32 outputs, depending on the modularity. For example, if a multiplexed output can handle four sets of 16-bit outputs, then it can drive up to four sets of 4-digit seven-segment indicators. Register data from the output table is sent to the module once a scan, updating each multiplexed set of output devices.
Enable Selected
Input can be received from processor when
enable is selected
Figure 6-48.
A 4-digit seven-segment BCD display with one common enable line.
The use of multiplexed outputs does not require special programming, since there are output instructions that specify the multiplexing operation. The only requirement is that the output devices (e.g., LED displays) must possess enable circuits allowing the module to connect the enable lines to each set of loads controlled by each set of 16 bits. Figure 6-49 shows a block diagram of
a multiplexed output module with four sets of seven-segment LED indicators. If output modules with enable lines are multiplexed, only passive-type output
devices (i.e., seven-segment indicators, displays, etc.), as opposed to control- type elements (i.e., low-current solenoids), can be controlled. The reason for this is that while multiplexed outputs are very useful, their output data does not remain static for one channel, or set, of 16 bits or 32 bits; it changes for each circuit that is being multiplexed. The only way to use multiplexed
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00 01 4 02 Ones (1s) 03 04
05 4 06 Tens (10s) 07 10
11 4 12 Hundreds (100s) 13 14
15 4 16 Thousands (1000s) 17
Figure 6-49.
A multiplexed output module with four sets of LED displays.
modules and still have correctly operating output devices is to incorporate additional latching/enabling circuits into the output devices’ hardware (see Figure 6-50). Such a situation may be encountered in the transmission of parallel data to instrumentation or computing devices that have enable and latching lines for incoming data.
Figure 6-50. Latching/enabling circuit.
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E X AM PLE 6 -4
Assume that the contents of the registers in the storage table shown in Figure 6-51 are transferred to a BCD multiplexed module and, subsequently, to a BCD display. (a) What will be the value displayed on the seven-segment indicators during the third scan as shown in the timing diagram in Figure 6-52? (b) Also indicate, using Figure 6-49 as
a reference, the lines (e.g., enable bits 0–17) that will be active during the third-scan transfer.
Word of
Figure 6-51. Storage table for Example 6-4.
Module
1st Scan
2nd Scan 3rd Scan 4th Scan
Figure 6-52. Timing diagram of enable signals from a BCD multiplexed module.
S OLU T I ON
(a) During the third scan (see Figure 6-53), the enable line EN3 will be ON, allowing the BCD data 3810 to go to BCD set #3. The value of register 4002 will be sent to the module through the wires connected to it. Since only BCD set #3 is enabled, it will accept all of the signals.
(b) The active lines, including the enable, are shown in blue. Note that in the other BCD sets, the BCD values from each set’s respective register are shown in gray. These values may remain on the display because they have been latched from previous scans. They are not shown in blue because they are not active.
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BCD#1
BCD#2
BCD#3 BCD#4
00 0 01 0 4 02 0 Ones (1s) 03 0 04 1
05 0 4 06 0 Tens (10s) 07 0 10 0
11 0 4 12 0 Hundreds (100s) 13 1 14 1
15 1 4 16 0 Thousands (1000s) 17 0
Figure 6-53. Multiplexed output module for Example 6-4.