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is accomplished electronically by the control unit according to the output port requests of incoming cells.
When a cell arrives at the switch, its header information is converted into an electrical signal and sent to the control unit by the corresponding splitter
detector. After evaluating the current destination requests considering the previous requests, the control unit sends the information related to the
current schedule to the scheduling stage. The cell is routed through the scheduling stage with respect to the information sent by the control unit. Due
to the statistical properties of the incoming cells, it is possible to lose some cells in the scheduling stage. After waiting for a certain period of time on the
assigned delay line, the cell reaches the switching stage. No contention occurs in the switching stage, on account of the precautions taken by the control
unit, and the cell reaches the requested output port. In this architecture, cells arriving at the same input port may arrive at output ports in the reverse
order, since they are assigned to different delay lines. Ordered delivery of cells at the output ports can be achieved by some additional operations in the
control unit.
The main bottleneck in this switch architecture is the control unit. The proposed collision resolution algorithm is too complicated to handle large
switch size or high input line rate. Some input buffers may be necessary in order to keep newly arriving cells while the control unit makes its arrange-
ments.
11.1.2 ATMOS
w x
Chiaroni et al. proposed a 16 = 16 photonic ATM switching architecture 10 for bit rates up to 10 Gbitrs. Basically, this switch consists of three main
blocks: the wavelength encoding block, the buffering and time switching block, and the wavelength selection block, as shown in Figure 11.2. In the
wavelength encoding block, there are N wavelength converters, one per input. Each input is assigned a fixed wavelength by its wavelength converter.
When a cell arrives, a small fraction of the optical signal power is tapped by a coupler and converted to an electronic signal. A controller processes these
converted data and extracts the routing information for the cell. The arriving cells with different wavelengths are wavelength-division multiplexed in the
buffering and switching block by a multiplexer. The buffering-and-time- switching block contains K fiber delay lines to store the payloads of the
incoming cells. There is also a space switch, which is made of semiconductor
Ž .
optical amplifier SOA gates. These gates are used to select the cells from the fiber delay lines and route them to the requested output ports. The
wavelength selection block consists of multiplexerrdemultiplexer and SOA gates in order to select a specific wavelength destined to an output port in a
cell time slot. This switch can perform the multicast function by using a broadcast-and-select approach.
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Fig. 11.2 Architecture of the ATMOS switch.
The cell contention problem is solved by the fiber delay lines. However, this approach cannot provide for sharing, so that a great number of delay
lines are necessary to meet the cell loss requirement. The architecture is bulky in structure, and the switch size is limited by the available number of
wavelengths.
11.1.3 Duan’s Switch
w x
Duan et al. introduced a 16 = 16 photonic ATM switching architecture 11 , as shown in Figure 11.3, where each output port is assigned a fixed wave-
length. This switch consists of three main blocks: wavelength encoding block, spatial switch block, and wavelength selection block. In the wavelength
encoding block, there are N wavelength converters, one per input, each being tuned to the destined output port. When a cell arrives, a small fraction
of the optical signal power is tapped by a coupler and sent to the electronic control unit, which processes the routing information of the cell. In a specific
cell time slot, cells destined to different outputs are tuned to different wavelengths. These cells with different wavelengths are routed through the
shortest path, which is selected by the SOA gates in the spatial switch. The spatial switch block contains K fiber delay lines to store the payloads of the
cells for contention resolution. Each fiber delay line can store up to N different wavelengths. In the wavelength selection block, in each cell slot
time, multiple wavelengths are broadcast to all output ports by a star coupler. There is a fixed-wavelength filter at each output port. These filters select the
cells associated with their wavelengths and send them to the corresponding output ports.
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Fig. 11.3 Architecture of the ATM wavelength routing system.
This switch cannot perform multicast functions, because of the fixed-wave- length filters at the output ports. Furthermore, if there is more than one cell
destined to the same output port, an arbitration mechanism is necessary in order to assign the incoming cells with the same wavelength to different fiber
delay lines. Such a requirement increases the control complexity. In order to meet the cell loss requirement, more fiber delay lines are necessary. More-
over, the electronic controller always has to monitor the status of fiber delay lines to preserve the cell sequence.
11.2 OPTOELECTRONIC PACKET SWITCHES
