Performance of SDA Switch

SCALABLE DISTRIBUTED-ARBITRATION SWITCH 231 counting from the top. The second rule is that the k th crosspoint buffer is selected with probability 1rk, while the k th transit buffer is selected with Ž . probability of k y 1 rk. For example, the third crosspoint buffer and the 1 2 transit buffer are selected with probabilities and , respectively. 3 3 Thus the SDA switch achieves distributed arbitration at each crosspoint. The longest control signal transmission distance for arbitration within one cell time is obviously the distance between two adjacent crosspoints. In the conventional switch, the control signal for ring arbitration must pass through all crosspoint buffers, belonging to the same output line. For that reason, the arbitration time of the SDA switch does not depend on the number of input ports.

8.2.2 Performance of SDA Switch

SDA switch performance was evaluated in terms of delay time and crosspoint buffer size by computer simulation. It is assumed that, in an N = N cross- point-buffered switch, the input traffic is random, the input load is 0.95, and cells are distributed uniformly to all crosspoint buffers belonging to the same input line. The SDA switch ensures delay time fairness. Figure 8.3 shows the proba- bility of the delay time being larger than d at N s 8. The probability is shown for each crosspoint buffer entered by cells. The delay time is defined as the time from the cell’s entering the crosspoint buffer until it reaches the Ž . Fig. 8.3 Delay performance of SDA switch. 䊚1997 IEEE. CROSSPOINT BUFFERED SWITCHES 232 Ž . Fig. 8.4 Maximum delay time. 䊚1997 IEEE. output line. In the SDA switch, when d is more than about 10 cell times, all delay times have basically the same probability and delay time fairness is Ž achieved. Since it takes at least N s 8 cell times for the cell in the top crosspoint buffer to enter the output line, fairness is not maintained at . smaller values. In addition, when d is larger than a certain time, the probability of the SDA switch delay time being larger than d is smaller than that of the RR switch, as shown in Figure 8.3. This is because, in the SDA switch, the cell with the largest delay time is selected. This effect becomes clearer as N increases. Figure 8.4 shows that the Ž y 4 . maximum delay time 10 quantile of the SDA does not change very much when N increases, while that of the RR switch increases rapidly. Further- 7 Ž . more, maximum SDA delay is smaller than 2 s 128 cell times even at large N. This means that synchronous counter size is just S s 8, as men- tioned before. The required crosspoint buffer size of the SDA switch is smaller than that of the switch, as shown in Figure 8.5. The required buffer sizes were estimated so as to guarantee the cell loss ratio of 10 y 9 . In the SDA switch, since the required buffer sizes differ for the crosspoint buffers, Figure 8.5 Ž . Ž shows the smallest top crosspoint buffer and the largest bottom crosspoint . buffer sizes. The sizes of the intermediate crosspoint buffers lie between these two values. Because the SDA switch has shorter delay time as ex- plained before, the queue length of the crosspoint buffer is also reduced. This is why the crosspoint buffer size of the SDA switch is less than that of the RR switch. The switch throughput of the SDA switch increases as the switch size N increases, as shown in Figure 8.6. Since the arbitration time does not limit SCALABLE DISTRIBUTED-ARBITRATION SWITCH 233 Ž . Fig. 8.5 Required buffer size. 䊚1997 IEEE. the output-line speed, the SDA switch can be expanded to achieve high switch throughput even if N is large. The switch throughput is calculated as C N, where C is the maximum output line speed. max max On the other hand, the switch throughput of the RR-based switch does not increase when N becomes large. Instead it depends on the transmission delay of the control signal in a crosspoint. The RR arbitration time limits the output line speed. The RR-based switch is not expandable, because of the limitation of the RR arbitration time. Ž . Fig. 8.6 Switch throughput vs. switch size. 䊚1997 IEEE. CROSSPOINT BUFFERED SWITCHES 234

8.3 MULTIPLE-QOS SDA SWITCH