Speedup Data Packet Flow

OPTICAL INTERCONNECTION NETWORK FOR TERABIT IP ROUTERS 303 Ž . Fig. 11.20 Architecture of a terabit IP router. 䊚1998 IEEE. . 51.2 ns required for 64-byte segments transmitted at 10 Gbitrs , demonstrat- ing that arbitration is no longer a bottleneck that limits the switch capacity.

11.4.2 A Terabit IP Router Architecture

w x Figure 11.20 depicts four major elements in the terabit IP router 24 : the OIN supporting nonblocking and high-capacity switching, the Ping-Pong Ž . arbitration unit PAU resolving the output contention and controlling the switching devices, the RMs performing IP packet forwarding, and the RC constructing routing information for the RMs. There are two kinds of RM: Ž . Ž . input RM IRM and output RM ORM . Both the IRMs and the ORMs Ž . implement IP packet buffering, route table lookup, packet filtering, and versatile interfaces, such as OC-3, OC12, OC-48, and Gigabit Ethernet. The interconnection between the RC and the RMs can be implemented with dedicated buses or through the OIN. Figure 11.20 simply illustrates the bus-based approach.

11.4.2.1 Speedup

The fixed-length segment switching technique is com- monly adopted in high-capacity IP routers to achieve high-speed switching and better system performance. Ž . Figure 11.21 a suggests that a speedup factor of two is required to achieve nearly 100 throughput under bursty traffic with geometric distribution and Ž . an average burst size of 10 packet segments. Figure 11.21 b shows the corresponding average delay. The total average delay of input and output queuing is very close to the theoretical bound of purely output queuing. The input delay is an order smaller than the total delay, hinting that an input- OPTICAL PACKET SWITCHES 304 Ž . Ž . Fig. 11.21 Switch performance: a throughput, b average delay. queued switch with speedup 2, on average, will perform as nearly well as a purely output-queued switch. Ž . The speedup induces more challenges in two aspects: 1 doubling the Ž . switch transmission speed to 10 Gbitrs, and 2 halving the arbitration time constraint. The first challenge can be easily met with optical interconnection technology, while the second can be met by the PPA scheme described in Section 11.4.5. OPTICAL INTERCONNECTION NETWORK FOR TERABIT IP ROUTERS 305 Fig. 11.22 The flow of packets across the router.

11.4.2.2 Data Packet Flow

A data segment unit of 64 bytes is chosen to Ž . accommodate the shortest IP packets 40 bytes . Variable-length IP packets are segmented before being passed through the switch. Figure 11.22 depicts Ž . the flow of packets across the router. A simple round-robin RR packet Ž . scheduler is used at each input line interface ILI to arrange the packet Ž . arrivals from different interfaces see also Fig. 11.20 . It uses a FIFO buffer per interface to store incoming packets. Since the output line speed of the scheduler depends on all interfaces, it can be shown that the maximum packet backlog at each input line FIFO is just twice the maximum IP packet size, so the same large buffer can be chosen to avoid any packet loss. Ž . The output packets of the scheduler enter the input switch interface ISI in which packet segmentation takes place. While a packet is being seg- Ž . mented, its IP header is first checked by the input packet filter IPF for Ž . network security and flow classification i.e., inbound filtering , as shown in Figure 11.20. Afterwards, the header is sent to the input forwarding engine Ž . Ž . IFE for IP table lookup, deciding which ORM s this packet is destined for. Data segments are stored in a FIFO while waiting for arbitration before being forwarded through the OIN. The forwarding sequence is packet by packet, not cell by cell, for each ISI, in order to simplify the reassembly. The input port number is added to each segment before it enters the OIN for ensuring correct packet reassembly at output ports. Segments of a packet arriving at an output port may be interleaved with those from other input ports. While a packet is being reassembled, its IP OPTICAL PACKET SWITCHES 306 Ž . header can be sent to the output packet filter OPF for outbound filtering Ž . and then to the output forwarding engine OFE for another IP route lookup Ž . to decide which outgoing interface s this packet should be destined for. The Ž . packets are then broadcast at the output line interface OLI to all desirable interfaces. Each interface can maintain two FIFOs supporting two traffic Ž . Ž . priorities: real-time RT and non-real-time NRT packets.

11.4.3 Router Module and Route Controller