MSDA Structure MULTIPLE-QOS SDA SWITCH

CROSSPOINT BUFFERED SWITCHES 234

8.3 MULTIPLE-QOS SDA SWITCH

Section 8.2 describes an SDA switch, that can support a single QoS class. Ž . This section describes a multiple-QoS SDA MSDA , to support multiple QoS classes by extending the concept of the SDA switch. The MSDA switch w x was presented in 4, 5 . We call the single-QoS SDA switch described in Section 8.2 SSDA in order to differentiate it from MSDA. To support multiple QoS classes, a priority queuing control at each crosspoint buffer is needed. One priority queuing approach is strict priority control. Consider two priority buffers. Under the strict priority system, cells Ž . waiting in the low-priority buffer delay-tolerant are served only if there are Ž . no cells awaiting transmission in the high-priority delay-sensitive buffer. Therefore, in the strict priority discipline, the low-priority traffic effectively uses the residual bandwidth. However, a problem occurs when we use a SSDA mechanism in a strict priority system that supports multiple QoS classes. The delay time of cells in the low-priority buffer will be very large, and the maximum delay time cannot be designed. Therefore, we cannot use the delay-time-based cell selection mechanism, as is used in the SSDA switch, for the low-priority class, due to the limitation on the number of bits for the delay measure in the cell header. The MSDA switch was developed to support high- and low-priority classes. In order to solve the problem of a cell selection mechanism for the low-prior- ity class, NTT introduced a distributed RR-based cell selection mechanism at each crosspoint for the low-priority class, which avoids using a synchronous w x counter such as is used for the high-priority class 4, 5 . The low-priority transit buffer at each crosspoint has virtual queues in accordance with the upper input ports. Cells for the low-priority class are selected by distributed ring arbitration among the low-priority crosspoint buffer and the virtual queues at the low-priority transit buffer. For the high-priority class, the same delay-time-based cell selection mechanism is used as in the SSDA switch. As a result, the proposed MSDA switch ensures fairness in terms of delay time for the high-priority class, while it ensures fairness in terms of throughput for the low-priority class.

8.3.1 MSDA Structure

This subsection describes the structure of the MSDA switch. Although we describe two priority classes in this paper for simplicity, we can easily extend the number of priority classes to more than two. The low-priority class tolerates delay, while the high-priority class requires a small delay time. In addition, the low-priority class is supposed to be a Ž . best-effort service class such as the unspecified bit rate UBR class. It requires fairness in terms of throughput rather than in terms of delay time, in order to effectively use the residual bandwidth that is not used by the high-priority traffic. Therefore, it needs a cell selection mechanism that MULTIPLE-QOS SDA SWITCH 235 Ž . Ž . Fig. 8.7 Multi-QoS SDA MSDA switch structure. 䊚1999 IEEE. preserves fairness in terms of delay time for the high-priority buffer and in terms of throughput for the low-priority class. In order to avoid the delay-time-based cell selection mechanism for the low-priority class, a distributed RR-based cell selection mechanism at each crosspoint for the low-priority class is used. Figure 8.7 shows the structure of the MSDA switch at the k th crosspoint. The MSDA switch has a crosspoint buffer and a transit buffer, each consist- ing of a high-priority buffer and a low-priority buffer, an arbitration-control Ž . part CNTL , and a selector at every crosspoint. Ž . A cell that passes an address filter AF enters into either the high- or the low-priority crosspoint buffer according to its priority class. At that time, at the high-priority crosspoint buffer, the value of a synchronous counter is written into the cell overhead, as in the SSDA switch. On the other hand, at Ž . the low-priority buffer, an input port identifier ID is written. For example, at the k th crosspoint, the value of the input port ID is k. This is used to distinguish which input port a cell comes from. The high- and low-priority crosspoint buffers send REQ to CNTL if there is at least one cell stored in each buffer. A cell that is transmitted from the upper crosspoint enters either the high-priority transit buffer or the low-priority crosspoint buffer according to the priority class. The low-priority transit buffer has k y 1 virtual queues, which are numbered 1, 2, . . . , k y 1. A low-priority cell that has input port Ž . ID i 1 F i F k y 1 enters virtual queue i. The high-priority transit buffer and the low-priority transit virtual queues send REQ to CNTL if there is at CROSSPOINT BUFFERED SWITCHES 236 Ž . Fig. 8.8 Low-priority selection rule. 䊚1999 IEEE. least one cell stored in each buffer or virtual queue. If the high- or low-priority transit buffers are about to become full, they send not-acknowl- edgments NACK H and NACK L, respectively, to the upper CNTL. ᎐ ᎐ The cell selection algorithm in the MSDA switch is as follows. If CNTL receives NACK dH from the lower high-priority transit buffer, neither a ᎐ high-priority cell nor a low-priority cell is transmitted. This is because, when the lower high-priority transit buffer is about to become full, there is no chance for the low-priority cell in the lower transit buffer to be transmitted. Low-priority cells cannot be transmitted when there is at least one high-prior- ity REQ from the crosspoint buffer and the transit buffer. When both the high-priority crosspoint buffer and the high-priority transit buffer send REQs to CNTL, the high-priority cell selection rule used is the cell selection rule used in the SSDA switch. Low-priority cells can be transmitted only when there are no REQs from either the high-priority crosspoint buffer or the high-priority transit buffer. If this condition is satisfied and CNTL does not receive either NACK H or ᎐ NACK L from the lower transit buffer, then the low-priority selection rule is ᎐ used. The low-priority crosspoint buffer and virtual queues in the low-priority transit buffer send REQs to CNTL as shown in Figure 8.8. Ring arbitration is executed at each crosspoint in a distributed manner. CNTL selects a cell and transmits it to the lower transit buffer. Thus the MSDA switch achieves distributed arbitration at each crosspoint. It uses the delay-time-based cell selection rule for the high-priority buffer and the distributed RR-based cell selection rule for the low-priority class.

8.3.2 Performance of MSDA Switch