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Because of this desirable property, the Clos network was widely adopted in traditional circuit-switched telephone networks, where a path is reserved
in the network for each call. If a Clos network has enough central modules, a path can always be found for any call between an idle input and an idle
output. Such a property is called nonblocking. There are however two senses of nonblocking: strict and rearrangeable. In a strictly nonblocking Clos
network, every newly arriving call will find a path across the network without affecting the existing calls. In a rearrangeably nonblocking network, we may
have to arrange paths for some existing calls in order to accommodate a new arrival. Readers are encouraged to learn more about circuit-switched Clos
networks from the related references listed at the end of this chapter.
This chapter will then focus on how the Clos network is used in packet switching. Section 10.1 describes the basic routing properties in a Clos
network and formulates the routing as a scheduling problem. In the following sections, we will discuss several different scheduling approaches. Section 10.2
uses a vector for each input and output module to record the availability of the central modules. Those vectors are matched up in pairs, each of which
has one vector for an input module and the other for an output module. For those pairs of modules that have a cell to dispatch between them, the two
vectors will be compared to locate an available central module if any. This method is conceptually easy, but it requires a high matching speed. In
Section 10.3, the ATLANTA switch handles the scheduling in a distributed manner over all central modules, each of which performs random arbitration
to resolve the conflicts. Section 10.4 describes a concurrent dispatching scheme that does not require internal bandwidth expansion while achieving a
high switch throughput. The path switch in Section 10.5 adopts the quasi-static virtual-path routing concept and works out the scheduling based on a
predetermined central stage connection pattern, which may be adjusted when the traffic pattern changes. All of these will give us different viewpoints to
look at the tradeoff between scheduling efficiency and complexity in a packet-switched Clos network.
10.1 ROUTING PROPERTIES AND SCHEDULING METHODS
A three-stage Clos network is shown in Figure 10.1. The first stage consists of k input modules, each of dimension n = m. The dimension of each central
module in the middle stage is k = k. As illustrated in Figure 10.2, the routing constraints of Clos network are briefly stated as follows:
1. Any central module can only be assigned to one input of each input module, and one output of each output module;
2. Input i and output j can be connected through any central module; 3. The number of alternative paths between input i and output j is equal
to the number of central modules.
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For the N = N switch shown in Figure 10.1, both the inputs and the outputs are divided into k modules with n lines each. The dimensions of the
input and output modules are n : m and m : n, respectively, and there are m middle-stage modules, each of size k = k. The routing problem is one of
directing the input cells to the irrespective output modules without path conflicts. For every time slot, the cell traffic can be written as
t t
⭈⭈⭈ t
1 , 1 1 , 2
1 , k
. .
. .
. .
T s ,
. .
. t
t ⭈⭈⭈
t
k , 1 k , 2
k , k
where t represents the number of cells arriving at the ith input module
i, j
destined for the jth output module. The row sum is the total number of cells arriving at each input module, while the column sum is the number of cells
destined for each output module, and they are given by
k
R s t
F n F m ,
i s 1, 2, . . . , k , 10.1
Ž .
Ý
i i , j
js1 k
S s t
F n ,
j s 1, 2, . . . , k. 10.2
Ž .
Ý
j i , j
is1
Since at most m cells for each output group are considered, the column sum constraint can then be rewritten as
S F m, j s 1, 2, . . . , k.
10.3
Ž .
j
The routing requirement is to assign each cell a specific path through the first two stages such that no two cells from an input module will leave at the
same outlet of the input module, and no two cells destined for the same output module will arrive at the same inlet of the output module. Such an
assignment is guaranteed by the nonblocking property of the three-stage Clos network for m G n.
Ž .
Let us label the set of outlets from each input module by A i s 1, . . . , k
i
Ž .
and the set of inlets into each output module by B j s 1, . . . , k . Each A
j i
or B contains exactly m elements denoting m physical lines. If these
j
elements are viewed as time slots instead of physical lines, then the first two Ž
. Ž
stages can be transformed into a k = k time᎐space᎐time TST switch see .
Ž .
Ž .
Figure 10.3 , where each input frame A and output frame B has m slots.
i j
The assignment problem is now seen as identical to that of a classic TST switch, and the necessary and sufficient conditions to guarantee a perfect or
Ž .
Ž . w x
optimal schedule are satisfied by 10.1 and 10.3 3 . For the assignment of an arbitrary cell at a given input module to its output module, the status of its
ROUTING PROPERTIES AND SCHEDULING METHODS
257
Ž
Fig. 10.3 A TST switch representation after the space-to-time transformation. 䊚1992
. IEEE.
Ž . Ž
.
Fig. 10.4
Matching of A and B X s busy, blank s open . 䊚1992 IEEE.
i j
A and the corresponding B may be examined, as shown in Figure 10.4,
i j
Ž .
where any vertical pair of idle slots representing physical lines could be chosen as a valid interconnect path. An overall schedule is perfect if all cells
are successfully assigned without any path conflict. However, optimal scheduling requires global information on the entire traffic T, and the
implementation tends to be very complex.
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10.2 A SUBOPTIMAL STRAIGHT MATCHING METHOD
