Dual Shuffle-Exchange Network with Error-Correcting Routing

BANYAN-BASED SWITCHES 118 The node sequence along the path is embedded in the binary string Ž . s . . . s d . . . d , represented by an n y 1 -bit window moving one bit per 2 n 1 ny1 stage from left to right. Ž . The state of a cell traveling in the SN can be represented by a pair R, X , where R is its current routing tag and X is the label of the node that the cell Ž . resides. At the first stage, the cell is in state d . . . d , s . . . s . The state n 1 2 n transition is determined by the self-routing algorithm as follows: exchange 6 r . . . r , x x . . . x r . . . r , x x . . . x Ž . Ž . 1 k 1 2 ny1 1 ky1 1 2 ny1 input label x output label r n k shuffle 6 r . . . r , x . . . x r . Ž . 1 ky1 2 ny1 k ² : r , x k 1 Notice that the routing bit used in the switching node is removed from the routing tag after each stage, before the node label is shuffled to the next Ž . stage. Finally, the cell will reach the state d d . . . d , from which the n 1 ny1 following 2 = 2 element will switch the cell to the destination. When a contention occurs at a switch node, one of the cells will be successfully routed while the other one will be deflected to the wrong output. As a result, only the nondeflected cells can ever reach their desired outputs. Ž . The deflected cells can restart routing with routing tag reset to d . . . d n 1 again at the deflection point, and if the SN is extended to consist of more than n stages, those deflected cells can reach the destination at later stages. As some cells will reach their destinations after fewer stages than others, a multiplexer is needed to collect cells that reach physical links of the same logical address at different stages. A cell will eventually reach its destination address with good probability provided that the number of stages L is sufficiently large. If it cannot reach the destination after L stages, it is considered lost.

5.5.3 Dual Shuffle-Exchange Network with Error-Correcting Routing

The error-correcting SN is highly inefficient, especially when n is large. This is because routing of the cell must be restarted from the beginning when- ever it is deflected. This is illustrated by the state-transition diagram in Ž . Figure 5.14 a , where the state is the distance or the number of stages away from destination. A desired network should be one with the state-transition Ž . diagram shown in Figure 5.14 b , in which the penalty is only one step backward. An example is the dual SN, which consists of a SN and an unshuffle- Ž . exchange network USN . An 8 = 8 USN is shown in Figure 5.15. It is the mirror image of the SN. Routing in successive stages is based on the least significant bit through the most significant bit. Using a numbering scheme DEFLECTION ROUTING 119 Ž . Fig. 5.14 a The state-transition diagram of a cell in the shuffle-exchange network, Ž . where the distance from the destination is the state. b One-step penalty-state transition diagram. Fig. 5.15 An 8 = 8 unshuffle-exchange network with five stages. BANYAN-BASED SWITCHES 120 similar to that in the SN, the path of a cell with source address S s s . . . s 1 n and destination address D s d . . . d can be expressed by 1 n S s s . . . s 1 n ² : ² : y , s d , s n n ny1 6 6 s . . . s d s . . . s Ž . Ž . 1 ny1 n 1 ny2 ² : ² : d , s d , s ny1 ny2 iq2 iq1 6 6 . . . d . . . d s . . . s Ž . iq2 n 1 i ² : ² : d , s d , s iq1 i 2 1 6 6 . . . d . . . d Ž . 2 n ² : d , 0 1 6 d . . . d s D. 1 n Ž . An n y 1 -bit window sliding on the binary string d . . . d s . . . s one bit 2 n 1 ny1 per stage from right to left exactly gives the sequence of nodes along the Ž . routing path. The initial state of the cell is d . . . d , s . . . s , and the 1 n 1 ny1 state transition is given by exchange 6 r . . . r , x x . . . x r . . . r , x x . . . x Ž . Ž . 1 k 1 2 ny1 1 ky1 1 2 ny1 input label x output label r n k unshuffle 6 r . . . r , r x . . . x . Ž . 1 ky1 k 1 ny2 ² : r , x k ny1 Ž . At the last stage, the cell is in state yd d . . . d and reaches its 1 2 n destination. Suppose an USN is overlaid on top of a SN, and each node in the USN is combined with its corresponding node in the SN so that a cell at any of the four inputs of the node can access any of the outputs of the node.The shuffle Ž . and the unshuffle interconnections between adjacent stages nodes compen- sate each other, so that the error caused by deflection in the SN can be corrected in the USN in only one step. See Figure 5.16. Cell A enters a SN from input 010 to output 101, and cell B, from input 100 to output 100. They collide at the second stage, when they both arrive at node 01 and request output 0. Suppose cell B wins the contention and cell A is deflected to node 11 in the third stage. Imagine cell A is moved to the companion node 11 in the corresponding USN, and is switched to output 0. Then it returns to node Ž . 01, the same node label where the error occurred, in two stages. At this point, the deflection error has been corrected and cell A can continue on its normal path in the SN. Intuitively, any incorrect routing operation is undone in the SN by a reverse routing operation in the USN. The above procedure can be formulated more rigorously as follows. Ž . Consider a cell in state r . . . r , x . . . x . The cell should be sent out on 1 k 1 ny1 ² : ² : link r , x in the SN. Suppose it is deflected to link r , x instead and k 1 k 1 Ž . reaches node x . . . x r in the next stage. The error correction starts by 2 ny1 k attaching the bit x to the routing tag instead of removing the bit r , so that 1 k DEFLECTION ROUTING 121 Fig. 5.16 A deflection error in the SN is corrected with the USN. Ž . the state of the cell will be r . . . r x , x . . . x r in the next stage. Then 1 k 1 2 ny1 k the cell is moved to the companion node in the USN to correct the error. If ² : the cell is routed successfully this time, it will be sent out on link x , r and 1 k Ž . return to the previous state r . . . r , x . . . x . Similarly, an error occur- 1 k 1 ny1 ring in the USN can also be fixed in one step with the SN. In general, a cell in the SN may also be deflected to a link in the USN and vice versa, and consecutive deflections can occur. A simple algorithm to take these consider- ations into account is described in the following. First of all, the companion 2 = 2 switch elements in the SN and in the USN are merged to form 4 = 4 switch elements to allow cells to be switched between the SN and the USN. Figure 5.17 shows a dual SN built with 4 = 4 Ž . switch elements. A new labeling scheme is used. The four inputs outputs of a switch node are labeled by 00, 01, 10, 11 from top to bottom. Outputs 00 and 01 are connected to the next stage according to an unshuffling pattern, while outputs 10 and 11 are connected to the next stage according to a BANYAN-BASED SWITCHES 122 Fig. 5.17 An 8 = 8 dual shuffle-exchange network. shuffling pattern. On the other hand, inputs 00 and 01 are connected to the previous stage according to a shuffling pattern, while inputs 10 and 11 are connected to the previous stage according to an unshuffling pattern. A link ² : ² : with label 1a, 0 b is an unshuffle link, and a link with label 0 a, 1b is a Ž . Ž . shuffle link. Two nodes a . . . a and b . . . b are connected by an 1 ny1 1 ny1 ² : unshuffle link 0 b , 1a if a . . . a s b . . . b , and by a shuffle link 1 ny1 1 ny2 2 ny1 ² : 1b , 0 a if a . . . a s b . . . b . ny1 1 2 ny1 1 ny2 Since each switch node has four outputs, two routing bits are required to specify the desired output of a cell at each stage. A cell with destination D s d . . . d can be routed through either the USN or the SN. Accordingly, 1 n Ž . the initial routing tag of a cell is set to either 0 d . . . 0 d USN or 1d . . . 1d 1 n n 1 Ž . SN . The state of a cell at any particular time is denoted by Ž . c r . . . c r , x . . . x . There are two possible regular transitions at a 1 1 k k 1 ny1 switch node; the cell will be sent out on an unshuffle link if c s 0 and a k shuffle link if c s 1. The corresponding state transitions are given by k c r . . . c r , x . . . x Ž . 1 1 k k 1 ny1 ² : 0 r , 1 x k ny1 ° 6 c r . . . c r , r x . . . x if c s 0, Ž . 1 1 ky1 ky1 k 1 ny2 k ~ ² : 1 r , 0 x k 1 ¢ 6 c r . . . c r , x . . . x r if c s 1. Ž . 1 1 ky1 ky1 2 ny1 k k Without deflections, it is easy to see that a cell with the initial routing set to Ž . Ž . 0 d . . . 0 d 1d . . . 1d will stay in the USN SN links throughout the 1 n n 1 routing process until it reaches the desired destination at one of the USN Ž . SN links. DEFLECTION ROUTING 123 The routing direction is given as follows: 1. If output c r is available and k s 1, the cell has reached its destina- k k tion; output the cell before the next shuffle if c s 1, and after the next unshuffle if c s 0. 2. If output c r is available and k 1, remove the two least-significant k k bits from the routing tag and send the cell to the next stage. 3. If output c r is unavailable and k - n, choose any other available k k outputs, attach the corresponding two bits for error correction to the routing tag, and send the cell to the next stage. 4. If output c r is unavailable and k s n, reset the routing tag to its k k original value, either 0 d . . . 0 d or 1d . . . 1d ; this prevents the length 1 n n 1 of the routing tag from growing in an unbounded fashion. Figure 5.18 illustrates the complete error-correcting algorithm. For any Ž . node with label x . . . x , the error correcting tag of outputs 00 and 01 is 1 ny1 Fig. 5.18 The error-correcting routing algorithm. BANYAN-BASED SWITCHES 124 Fig. 5.19 An example of error-correcting routing in DSN. 1 x , and the error-correcting tag of outputs 10 and 11 is 0 x. In either case, ny1 the error-correcting tag is just the second component cx in the link label ² : cr, cx , where x s x , which is either x or x according as c s 1 cqc Ž ny1. 1 ny1 Ž . Ž . ² : SN or c s 0 USN . Therefore, a cell deflected to link cr, cx will return ² : to its previous state via link cx, cr in the next stage. This point is illustrated in Figure 5.19 by the same example given in Figure 5.16. This algorithm can implicitly handle successive deflections as shown by the finite-state machine representation of the algorithm in Figure 5.20. The state Fig. 5.20 Finite-state machine representation of the error-correcting routing algo- rithm when c s 1. k MULTICAST COPY NETWORKS