SWITCHING CONCEPTS
17
the allocated bandwidth to meet each connection’s delay rthroughput re-
quirements. Cells or packets are usually timestamped with values and trans- mitted with an ascending order of the timestamp values. We will not discuss
such scheduling in this book, but rather focus on the scheduling to resolve output port contention.
In addition to scheduling cells to meet the delay᎐throughput requirement at the output ports, it is also required to implement buffer management at
the input or output ports, depending on where the buffer is. The buffer management discards cells or packets when the buffer is full or exceeds some
predetermined thresholds. The objectives of the buffer management are to meet the requirements on cell loss rate or fairness among the connections,
which can have different or the same loss requirements. There is much research in this area to determine the discarding policies. Some of them will
push out the cells or packets that have been stored in the buffer to meet the loss or fairness objectives, which is usually more complex than the scheme
that blocks incoming cells when the buffer occupancy exceeds some thresh- olds. Again this book will focus on the switch fabric design and performance
studies and will not discuss the subject of buffer management. However, when designing an ATM switch, we need to take into consideration the
potential need for performing packet scheduling and buffer management. The fewer locations of the buffers on the data path, the less such control is
required, and thus the smaller the implementation cost.
Section 2.1 presents some basic ATM switching concepts. Section 2.2 classifies ATM switch architectures. Section 2.3 describes performance of
typical basic switches.
2.1 SWITCHING CONCEPTS
2.1.1 Internal Link Blocking
While a cell is being routed in a switch fabric, it can face a contention problem resulting from two or more cells competing for a single resource.
Internal link blocking occurs when multiple cells contend for a link at the same time inside the switch fabric, as shown in Figure 2.1. This usually
happens in a switch based on space-division multiplexing, where an internal physical link is shared by multiple connections among input
routput ports. A blocking switch is a switch suffering from internal blocking. A switch that
does not suffer from internal blocking is called nonblocking. In an internally buffered switch, contention is handled by placing buffers at the point of
conflict. Placing internal buffers in the switch will increase the cell transfer delay and degrade the switch throughput.
BASICS OF PACKET SWITCHING
18
Fig. 2.1
Internal blocking in a delta network: two cells destined for output ports 4 and 5 collide.
2.1.2 Output Port Contention
Output port contention occurs when two or more cells arrive from dif- ferent input ports and are destined for the same output port, as shown in
Figure 2.2. A single output port can transmit only one cell in a time slot; thus the other cells must be either discarded or buffered. In the output-buffered
switches, a buffer is placed at each output to store the multiple cells destined for that output port.
Fig. 2.2 Output port contention.
SWITCHING CONCEPTS
19
2.1.3 Head-of-Line Blocking
Another way to resolve output port contention is to place a buffer in each input port, and to select only one cell for each output port among the cells
destined for that output port before transmitting the cell. This type of switch is called the input-buffered switch. An arbiter decides which cells should be
chosen and which cells should be rejected. This decision can be based on cell priority or timestamp, or be random. A number of arbitration mechanisms
have been proposed, such as ring reservation, sort-and-arbitrate, and route- and-arbitrate. In ring reservation, the input ports are interconnected via a
ring, which is used to request access to the output ports. For switches that are based on a sorting mechanism in the switch fabric, all cells requesting the
same output port will appear adjacent to each other after sorting. In the route-and-arbitrate approach, cells are routed through the switch fabric and
arbiters detect contention at the point of conflict.
A well-known problem in a pure input-buffered switch with first-in-first- Ž
. Ž
. out FIFO input buffers is the head-of-line HOL blocking problem. This
happens when cells are prevented from reaching a free output because of other cells that are ahead of it in the buffer and cannot be transmitted over
the switch fabric. As shown in Figure 2.3, the cell behind the HOL cell at input port 0 is destined for an idle output port 1. But it is blocked by the
HOL cell, which failed a transmission due to an output contention. Due to the HOL blocking, the throughput of the input buffered switch is at most
w x
58.6 for random uniform traffic 5, 7 .
2.1.4 Multicasting
