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177
Fig. 6.28 Fault location test for a cross-stuck SWE by moving the square block
around in the SWE array.
Figure 6.28 shows an example of the fault location test for a CS SWE Ž
. CS test . This test can also be used to locate a HS SWE. To diagnose the
SWEs in the three uppermost rows, the priorities of the test cells, X3, X2, X1, V1, V2, and V3, are arranged in descending order. These cells’ FAs are
set to be identical, but the FAs of test cells X4, X5, and X6 are set to be Ž
different. The CS test forces all SWEs in the square block 3 = 3 in this .
example to a toggle state and all other SWEs to a cross state. If there exists a CS in this square block, the output pattern will be different from the
u v
expected one. For offline testing of a switch module, at least NrL M tests
1
u v
are required in MGN1, and L MrL tests in MGN2.
1 2
6.4.3.2 Vertical-Stuck and Horizontal-Stuck Cases
If a VS or an HS fault exists in the SWE array, cells that pass through the faulty SWE will be
corrupted as shown in Figure 6.24 and Figure 6.25. Once a VS fault is
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178
Fig. 6.29 Reconfiguration by isolating a faulty column caused by a vertical s stuck
Ž .
SWE 4, 2 .
detected by the FD at MTTs or OPCs, the information about the faulty column is known immediately. This information is sufficient to reconfigure
Ž the switch network. For example, if the jth column contains a VS j s 2 in
. Figure 6.24 , all the SWEs in the jth column are forced to a cross state, so
that the jth column is isolated. For instance, Figure 6.29 shows the reconfigu- ration with the second column isolated. Of course, the cell loss performance
is degraded because of the reduction of available routing links.
Special attention is needed for a HS fault, because we must locate exactly the faulty SWE prior to proper reconfiguration. Once a HS fault is detected,
we have the information about the faulty row automatically. What we need is the column information. In order to locate the fault, we define a fault
Ž .
location test HS test for it. The HS test sets the test cells’ FA, priority, and source address to
appropriate values such that all SWEs on the faulty row are forced to a
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179
toggle state. Let us consider an HS test for the ith row of the SWE array. The FA of test cells from all MPMs except the ith MPM are set to all zeros
Ž .
for mismatching purposes , while the test cell’s FA from the ith MPM is set to be identical to that of the test cells from the AB. All test cells’ source
addresses are set to their row numbers or column numbers, depending on whether they are fed to the SWE array horizontally or vertically. Priorities
of the test cell from the ith MPM and broadcast test cells from AB are set in descending order. Normally, the priority of the test cell from the ith MPM is
the highest,the broadcast test cell from the first column is the second highest, the broadcast test cell from the second column is the third highest, and so on.
Fig. 6.30 Fault location test for a horizontal-stuck SWE by forcing the SWEs in the
faulty row to a toggle state.
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180
With this arrangement, the cell from the ith MPM will appear at the first output link, while the broadcast cell from the r th AB will appear at the
Ž .
r q 1 th output link or the ith discarding output. The FDs at the output links examine the source address SA field to locate the faulty column that
contains the HS SWE. If the jth column contains a HS SWE, the test cell from the ith MPM will appear at the first output link, and the test cell V
r
Ž .
Ž .
broadcast from the r th AB 1 F r F j y 1 will appear at the r q 1 th output link. The test cell V broadcast from the jth AB will be corrupted and
j
appear at the ith discarding output. The test cell, V broadcast from the
jqs
Ž .
Ž .
Ž .
j q s th AB 1 F s F L M y j will appear at the j q s th output link. If a
1
HS SWE is on the last column, the test cell from the r th AB will appear at Ž
. the r q 1 th output link, and the test cell broadcast from the rightmost AB
appears at the ith discarding output and is corrupted. Figure 6.30 shows a test example where a HS SWE exists in the fourth row
and all SWEs in the fourth row are forced to a toggle state to locate the HS
Fig. 6.31 Reconfiguration by isolating the upper column of the horizontal-stuck
Ž .
SWE 4, 2 .
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181
Ž .
Ž .
SWE. For example, if SWE 4, 2 is HS, cell V3 instead of cell V2 will appear at output link 3; cell V2, which is corrupted, will appear at the 4th
discarding output. Ž
. After locating the HS fault, say at SWE i, j , we can reconfigure the SWE
Ž .
array by forcing SWE i, j to a toggle state and the switch elements that are w
Ž .
x in the same column and are above the faulty SWE SWE k, j , 1 F k F i y 1
Ž .
to a cross state, so that cells will not be affected by the HS SWE i, j . Figure Ž
. 6.31 shows an example of the reconfiguration for a HS at SWE 4, 2 .
6.4.4 Performance Analysis of Reconfigured Switch Module
