Cell Loss Rate in MGN2
6.3.4.2 Cell Loss Rate in MGN2
Special attention is required when analyzing the cell loss rate in MGN2, because the cell arrival pattern at the inputs of MGN2 is determined by the number of cells passing through the Ž . corresponding concentrator in MGN1. If there are l l F L M cells arriving 1 at MGN2, these cells will appear at the upper l consecutive inputs of MGN2. If more than L M cells are destined for MGN2, only L M cells will arrive at 1 1 Ž . MGN2’s inputs one cellper input port , while excessive cells are discarded in MGN1. The cell loss rate of a concentrator in MGN2 is assumed to be P , and the 2 probability that l cells arrive at a specific concentrator in MGN2 to be B . l Both P and B depend on the average number of cells arriving at the inputs 2 l Ž of MGN2 i.e., the number of cells passing through the corresponding . Ž . concentrator in MGN1 . This implies that P is a function of A in 6.8 . In 2 k order to calculate P , the probability of j cells arriving at MGN2, denoted as 2 I , is found to be j A for j - L M , ° j 1 N ~ I s j A for j s L M. Ý k 1 ¢ ksL M 1 Ž . If j j F L M cells arrive at MGN2, they will appear at the upper j 1 consecutive inputs of MGN2. Since how and where the cells appear at the MGN2’s inputs does not affect the cell loss performance, the analysis can be simplified by assuming that a cell can appear at any input of the MGN2. Let us denote by B the probability that l cells arrive at the inputs of a l j specific concentrator in MGN2 for given j cells arrived at MGN2. Then, j jyl l B s q 1 y q , 0 F j F L M, 0 F l F j, Ž . l j 1 ž l w x where q is equal to E F rM under the assumption that replicated cells are 2 uniformly delivered to the M concentrators in MGN2. Ž . If no more than L cells arrive at MGN2 0 F j F L , no cell will be 2 2 discarded in MGN2, because each concentrator can accept up to L cells 2 Ž during one cell time slot. If more than L cells arrive at MGN2 L F j F 2 2 . L M , cell loss will occur in each concentrator with a certain probability. 1 A TWO-STAGE MULTICAST OUTPUT-BUFFERED ATM SWITCH 167 Since replicated cells are assumed to be uniformly distributed to all M outputs in MGN2, the probability B that l cells are destined for a specific l output port of MGN2 in a cell time slot is L M 1 B s B I . Ý l l j j jsl The cell loss rate in MGN2, P , is 2 L M 1 w x l y L B E D Ž . Ý 2 l lsL q1 2 P s 6.13 Ž . 2 w x E F 1 w x N ⭈ 1 y P E F Ž . 1 2 K w x ⭈ E D M L M 1 l y L B Ž . Ý 2 l lsL q1 2 s . w x w x E F ⭈ 1 y P E F Ž . 1 1 2 w x Here N ⭈ E F rK is the average number of cells destined for a concentra- 1 Ž w x .Ž . tor in MGN1 from the inputs of the MOBAS, and N ⭈ E F rK 1 y P is 1 1 the average number of cells that have survived in this concentrator, which in turn becomes the average number of cells arriving at the correspond- Ž . Ž w x .Ž . ing MGN2. Thus, the denominator in 6.13 , N ⭈ E F rK 1 y P 1 1 w x w x E F E D rM, is the average number of cells effectively arriving at a specific 2 Ž . L 1 M Ž . w x output port. The numerator in 6.13 , Ý l y L B E D , is the average lsL q1 2 l 2 number of cells effectively lost in a specific concentrator in MGN2, because the lost cell can be a cell that will be duplicated in the OPC. Figure 6.21 shows the plots of the cell loss probability at MGN2 vs. L 2 for various average duplication values and an effective offered load Ž w x w x w x. s E F E F E D of 0.9. The average fanout on MGN1 is assumed to be 1 2 Ž w x . Ž . 1.0 E F s 1.0 , the group size to be 32 M s 32 , and the expansion ratio 1 Ž . to be 2.0 L s 2.0 . Since the traffic load on MGN2 decreases as the 1 Ž w x. average cell duplication E D increases, the cell loss rate in MGN2 de- w x creases as E D increases. Therefore, the switch design parameter L is 2 more stringently restricted in the unicast case than in the multicast. Conse- quently, if MGN2 is designed to meet the performance requirement for unicast calls, it will also satisfy multicast calls’ performance requirement. KNOCKOUT-BASED SWITCHES 168 Fig. 6.21 Cell loss probability vs. group expansion ratio L in MGN2. 26.3.4.3 Total Cell Loss Rate in the MOBAS
Parts
» ATM Switch Structure ATM SWITCH SYSTEMS
» DESIGN CRITERIA AND PERFORMANCE REQUIREMENTS
» Internal Link Blocking Output Port Contention Head-of-Line Blocking
» Shared-Medium Switch Time-Division Switching
» Single-Path Switches Space-Division Switching
» Multiple-Path Switches Space-Division Switching
» Internally Buffered Switches Recirculation Buffered Switches
» Input- and Output-Buffered Switches Virtual-Output-Queueing Switches
» Input-Buffered Switches PERFORMANCE OF BASIC SWITCHES
» Output-Buffered Switches PERFORMANCE OF BASIC SWITCHES
» Completely Shared-Buffer Switches PERFORMANCE OF BASIC SWITCHES
» Bernoulli Arrival Process and Random Traffic On–Off Model and Bursty Traffic
» Multiline Input Smoothing Speedup Parallel Switch
» Window-Based Lookahead Selection Increasing Scheduling Efficiency
» VOQ-Based Matching Increasing Scheduling Efficiency
» Parallel Iterative Matching PIM Iterative Round-Robin Matching iRRM
» Iterative Round-Robin with SLIP i SLIP
» Dual Round-Robin Matching DRRM
» Round-Robin Greedy Scheduling SCHEDULING ALGORITHMS
» Bidirectional Arbiter Design of Round-Robin Arbiters r
» Token Tunneling This section introduces a more efficient arbi-
» Most-Urgent-Cell-First Algorithm MUCFA OUTPUT-QUEUING EMULATION
» Critical Cell First CCF Last In, Highest Priority LIHP
» LOWEST-OUTPUT-OCCUPANCY-CELL-FIRST JONATHAN CHAO CHEUK LAM
» LINKED LIST APPROACH JONATHAN CHAO CHEUK LAM
» CONTENT-ADDRESSABLE MEMORY APPROACH JONATHAN CHAO CHEUK LAM
» Washington University Gigabit Switch
» Shared-Memory Switch with a Multicast Logical Queue Shared-Memory Switch with Cell Copy
» Shared-Memory Switch with Address Copy
» BANYAN NETWORKS JONATHAN CHAO CHEUK LAM
» Three-Phase Implementation Ring Reservation
» BATCHER-SORTING NETWORK THE SUNSHINE SWITCH
» Tandem Banyan Switch DEFLECTION ROUTING
» Shuffle-Exchange Network with Deflection Routing
» Dual Shuffle-Exchange Network with Error-Correcting Routing
» Generalized Self-Routing Algorithm Broadcast Banyan Network
» Boolean Interval Splitting Algorithm Nonblocking Condition of Broadcast Banyan Networks A
» Encoding Process MULTICAST COPY NETWORKS
» Concentration Decoding Process Overflow and Call Splitting
» A. Cyclic Running Adder Network Figure 5.34 shows the struc-
» Concentration The starting point in a CRAN may not be port 0,
» Basic Architecture SINGLE-STAGE KNOCKOUT SWITCH
» Knockout Concentration Principle SINGLE-STAGE KNOCKOUT SWITCH
» Construction of the Concentrator
» Maximum Throughput CHANNEL GROUPING PRINCIPLE
» Two-Stage Configuration A TWO-STAGE MULTICAST OUTPUT-BUFFERED ATM SWITCH
» Multicast Grouping Network A TWO-STAGE MULTICAST OUTPUT-BUFFERED ATM SWITCH
» Translation Tables A TWO-STAGE MULTICAST OUTPUT-BUFFERED ATM SWITCH
» Cross-Stuck CS Fault Toggle-Stuck TS Fault Verticalr
» Toggle-Stuck and Cross-Stuck Cases
» Vertical-Stuck and Horizontal-Stuck Cases
» Cross-Stuck and Toggle-Stuck Cases
» Vertical-Stuck Case Horizontal-Stuck SWE Case
» APPENDIX JONATHAN CHAO CHEUK LAM
» BASIC ARCHITECTURE JONATHAN CHAO CHEUK LAM
» MULTICAST CONTENTION RESOLUTION ALGORITHM
» IMPLEMENTATION OF INPUT PORT CONTROLLER
» Cell Loss Probability PERFORMANCE
» ATM ROUTING AND CONCENTRATION CHIP
» Memoryless Multistage Concentration Network
» Buffered Multistage Concentration Network
» Resequencing Cells ENHANCED ABACUS SWITCH
» Complexity Comparison ENHANCED ABACUS SWITCH
» Packet Interleaving ABACUS SWITCH FOR PACKET SWITCHING
» Cell Interleaving ABACUS SWITCH FOR PACKET SWITCHING
» MSDA Structure MULTIPLE-QOS SDA SWITCH
» OVERVIEW OF CROSSPOINT-BUFFERED SWITCHES OVERVIEW OF INPUT
» Basic Architecture Unicasting Operation
» ROUTING PROPERTIES AND SCHEDULING METHODS
» A SUBOPTIMAL STRAIGHT MATCHING METHOD
» Basic Architecture Distributed and Random Arbitration
» Basic Architecture THE CONTINUOUS ROUND-ROBIN DISPATCHING SWITCH
» Concurrent Round-Robin Dispatching Scheme
» Homogeneous Capacity and Route Assignment
» The Staggering Switch ALL-OPTICAL PACKET SWITCHES
» HYPASS OPTOELECTRONIC PACKET SWITCHES
» STAR-TRACK OPTOELECTRONIC PACKET SWITCHES
» Cisneros and Brackett’s Architecture
» Basic Architecture THE 3M SWITCH
» Cell Delineation Unit THE 3M SWITCH
» VCI-Overwrite Unit Cell Synchronization Unit
» Input and Output Forwarding Engines Input and Output Switch Interfaces
» Route Controller Router Module and Route Controller
» Input Optical Module Output Optical Module Tunable Filters
» Principles of Ping-Pong Arbitration Consider an N-input
» Performance of PPA Implementation of PPA
» Priority PPA Ping-Pong Arbitration Unit
» Component Complexity OIN Complexity
» Power Budget Analysis OPTICAL INTERCONNECTION NETWORK FOR
» Crosstalk Analysis OPTICAL INTERCONNECTION NETWORK FOR
» System Considerations WIRELESS ATM STRUCTURE OVERVIEWS
» NEC’s WATMnet Prototype System
» Olivetti’s Radio ATM LAN Virtual Connection Tree
» BAHAMA Wireless ATM LAN NTT’s Wireless ATM Access
» Radio Physical Layer RADIO ACCESS LAYERS
» Medium Access Control Layer Data Link Control Layer
» Connection Rerouting HANDOFF IN WIRELESS ATM
» Buffering Cell Routing in a COS
» Design of a Mobility-Support Switch
» Performance MOBILITY-SUPPORT ATM SWITCH
» Architectures of Generic Routers
» IP ROUTE LOOKUP BASED ON CACHING TECHNIQUE IP ROUTE LOOKUP BASED ON STANDARD
» Levels 2 and 3 of Data Structure
» Adapting Binary Search for Best-Matching Prefix
» Precomputed 16-Bit Prefix Table Multiway Binary Search: Exploiting the Cache Line
» Lookup Algorithms and Data Structure Construction
» Prefix Update Algorithms IP ROUTE LOOKUPS USING TWO-TRIE STRUCTURE
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